|Introduction to TetraMAX II|
Antun Domic, Executive VP and GM of the Design Group unveils Synopsys' next-generation ATPG and diagnostics solution. TetraMAX II surpasses previous technologies that are limited by high memory usage, enabling it to achieve 10X faster runtime with 25% fewer patterns.
Antun Domic, EVP & GM, Design Group, Synopsys, Inc.
|23rd Annual Test SIG Event at ITC 2015|
Watch Test experts from STMicroelectronics, NVIDIA, Teradyne and Synopsys describe how they are using Synopsys’ synthesis-based test solution to test FinFETs, meet challenging ISO 26262 automotive requirements and implement hierarchical test of SoCs.
Davide Appello, STMicroelectronics; Jon Colburn, NVIDIA; Marc Hunter, Teradyne; Peter Wohl, Synopsys
|Synopsys Highlights at the 2015 International Test Conference|
Antun Domic, EVP & GM for the Design Group at Synopsys, discusses exciting new Test-related announcements and Synopsys' activities at the International Test Conference (ITC) 2015.
Antun Domic, EVP & GM, Design Group, Synopsys
|Test SIG Event at ITC 2014|
View this video of the 22nd Annual Test SIG Event at ITC 2014 and hear test experts from leading companies present on how they are deploying significant new capabilities in Synopsys’ synthesis-based test solution to reduce test time, increase silicon test quality and ramp up yield.
Naveen Mysore, Avago Technologies; Ying-Yen Chen, Realtek Semiconductor ; Saman Adham, TSMC Ottawa Design Center; Nelly Feldman, STMicroelectronics
|Introduction to DFTMAX and TetraMAX 2013.12 Features|
Learn about the important new capabilities available in the 2013.12 releases of DFTMAX compression and TetraMAX ATPG.
Julie Villar, Corporate Applications Engineer, Synopsys
|Test SIG Event at ITC 2013|
At Synopsys’ Special Interest Group (SIG) event at ITC 2013, Test experts from Synopsys and STMicroelectronics introduced new Synopsys test technologies, DFTMAX Ultra and DesignWare STAR Hierarchical System. In these videos, you will learn why and how leading companies are deploying these technologies to boost compression, significantly lower test costs and improve turnaround time implementing hierarchical test for large SoCs and IP.
Rohit Kapur, Scientist, Synopsys; Swapnil Bahl, SoC Test and Diagnosis Team Lead, STMicroelectronics; Yervant Zorian, Fellow and Chief Architect, Synopsys and Charutosh Dixit, Test Engineering Manager, LSI Corporation
|Synopsys Announces New Test Technologies at ITC 2013|
Learn about Synopsys' exciting technology announcements at ITC 2013 in this EDACafe.com interview.
Yervant Zorian, Chief Architect, Synopsys
Introducing DFTMAX Ultra, a new synthesis-based test product that delivers higher compression to reduce silicon test costs.
Antun Domic, General Manager, Implementation Group, Synopsys
|Introduction to Synthesis-Based Test|
Watch this short video to learn about Synopsys’ Synthesis-Based Test technology and Test product portfolio.
Arif Samad, VP Engineering, Synopsys
|Accelerate Product Ramp with TetraMAX ATPG and Yield Explorer|
Girish Patankar discusses diagnostics in TetraMAX ATPG, accuracy improvements with physical diagnostics, and how TetraMAX ATPG and Yield Explorer form a complete solution for volume diagnostics.
Girish Patankar, Sr. R&D Manager