| DC Explorer |
Early RTL exploration accelerates design schedules. |
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| Design Compiler Graphical |
Produces a better starting point for faster physical implementation |
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| DC Ultra |
Best-in-class Quality of Results that correlate to Layout |
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| Power Compiler |
Complete solution for power synthesis and optimization |
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| DFT Compiler |
DFT Compiler - Synopsys' design-for-test (DFT) synthesis solution - delivers DFT transparently within Synopsys' logical and physical synthesis flows with fastest time to results. |
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| DFTMAX |
DFT MAX compression is a comprehensive scan compression solution that addresses the cost challenges of testing designs fabricated in 130-nm and smaller process technologies. |
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| TetraMAX ATPG |
TetraMAX® ATPG automatically generates high quality manufacturing test patterns. |
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| Formality |
Equivalence checking for DC Ultra |
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