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Hua Hong NEC and Synopsys Jointly Develop Reference Design Flow 2.0 

Hua Hong NEC Chooses Synopsys as Primary EDA Provider

MOUNTAIN VIEW, Calif. and SHANGHAI, China, - October 13, 2006- Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, and Shanghai Hua Hong NEC (Hua Hong NEC) Electronics Co. Ltd., one of the most advanced integrated circuit (IC) manufacturers in China, today announced that the two companies have jointly developed reference design flow 2.0 for Hua Hong NEC's 0.18-micron process. Choosing Synopsys as its primary electronic design automation (EDA) provider, Hua Hong NEC worked closely with Synopsys Professional Services to develop the complete RTL-to-GDSII reference design flow based on Synopsys' Galaxy™ Design and Discovery™ Verification Platforms, and on Hua Hong NEC's I/O and standard cell libraries.

The Hua Hong NEC-Synopsys Reference Flow 2.0 helps designers address timing closure challenges, reduce risk and achieve predictable success for complex systems-on-chip (SoCs). The flow utilizes the Galaxy design platform for RTL synthesis, physical implementation and sign-off, and the Discovery Verification Platform with the VCS® solution for RTL simulation. New features in Reference Flow 2.0 include enhanced floorplanning capabilities, which are provided by the Jupiter-XT™ design planning solution, as well as design for test (DFT) and automatic test pattern generation (ATPG) capabilities offered by the DFT MAX and TetraMAX® tools.

The Hua Hong NEC-Synopsys Reference Flow 2.0 also features the complete IC implementation solution from Synopsys, including RTL synthesis, test, power optimization and physical implementation. In addition, Reference Flow 2.0 includes PrimePower for full-chip power analysis; the PrimeTime® SI, Star-RCXT™ and Hercules™ solutions for final design sign-off; and the Formality® equivalence checker. A broad range of compatible implementation and verification IP is also available through the DesignWare® library.

"This solution will give our customers a high-performance, low-risk path to silicon," said Dr. Xiangyang Li , senior director of Hua Hong NEC's Design Service Division. "Synopsys' Galaxy design and Discovery verification platforms, along with our silicon-proven standard cell libraries, will enable our customers to address their complex design issues and help meet aggressive time-to-market schedules."

"Hua Hong NEC requires silicon-proven design flows to help its customers achieve predictable success for complex SoC designs," said Rich Goldman, vice president, Strategic Market Development at Synopsys. "We've worked closely with Hua Hong NEC to help ensure that our flows work seamlessly with their silicon processes and give our mutual customers a tested RTL-to-GDSII solution. We look forward to working with Hua Hong NEC in the future as they continue to develop more advanced silicon technology."

Availability
Customers can request the Hua Hong NEC-Synopsys Reference Flow 2.0 flow today from their Hua Hong NEC account manager.

About Hua Hong NEC
Hua Hong NEC, a pure play foundry in China, provides professional and value-added foundry service to domestic and overseas customers. It offers a wide range of CMOS technology processes, including Logic, RF, Mixed-Signal, Embedded Non-Volatile Memories, HV, BCD, etc, which are used in manufacturing of IC for Smart Card, communications, consumer electronics and computer products. Hua Hong NEC provides its customers with round-the-clock and first-class technology support and services, including various IP, foundry mainstream process design, layout, wafer sort, parametric test, reliability test and failure analysis. Hua Hong NEC also provides mask manufacturing and packaging services through its partners. With ISO9001 Quality Management System, ISO14001 Environment Management System and BS7799 Information Security Management System certification by BSI, Hua Hong NEC ensures its customers of high product quality and information security. For more information, please visit the website: www.hhnec.com.

About Synopsys
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at www.synopsys.com.

Synopsys, VCS, TetraMAX, PrimeTime, Formality and DesignWare are registered trademarks of Synopsys, Inc. Galaxy, Discovery, Jupiter-XT, Star-RCXT and Hercules are trademarks of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.



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