Custom Designer SDL is an add-on option to the Galaxy Custom Designer® custom implementation solution and helps boost designer productivity and layout throughput.
Custom Designer SDL builds on the open foundation of Custom Designer LE and delivers a complete solution for the layout of today’s complex AMS designs.
Tightly integrated with Synopsys’ industry-leading implementation solutions, Custom Designer SDL provides high layout productivity in an easy-to-use environment.
Custom Designer Schematic-Driven Layout (SDL)
The complex task of implementing today’s tough AMS and custom designs requires state-of-the-art tools that are architected for productivity from the ground up. Custom Designer’s SDL delivers a high-capacity, high-performance solution for today’s complex designs.
Custom Designer SDL is fully compliant with all OpenAccess Python-based interoperable process design kits (iPDKs) as well as C++ and Tcl-based PDKs.
Custom Designer SDL manages and organizes all of the details of correct-byconstruction device placement and net connectivity information, enabling everyone from the novice to the advanced designer to be more productive.
- Correct-by-construction device placement
- Interactive point-to-point (P2P) and follow-the-cursor (FTC) routing technology increases interconnect layout productivity
- “Real-time connectivity” through concurrent device and interconnect LVS checking
- High capacity, high performance for today’s large designs
- Batch or interactive rapid ECO update capability
- Import from layout capability for accelerated layout porting
Full Hierarchical SDL Support
Custom Designer SDL operates with a fully hierarchical connectivity model working simultaneously at all levels of the design hierarchy. This capability will flag connectivity errors as they occur and make designers more productive by managing the complexity of interactions throughout the design hierarchy.
For example, a designer working in a hierarchical schematic can run SDL to generate layout. Custom Designer SDL will instantiate cells and P-cells and establish the correct connectivity, enabling the designer to perform LVS-correct routing hook-ups. When the designer returns to the original level of hierarchy and runs SDL to generate layout at that level, Custom Designer SDL understands that at the lower level layout creation has already been performed and will place the remaining cells needed to complete the design.
Custom Designer SDL also supports one-to-many mapping across multiple levels of hierarchy. This allows layout designers to configure a different layout hierarchy without modifying the schematic hierarchy.
Figure 1: Use on-canvas editing to make a parameter change
without going through the property editor
Like Custom Designer SE, Custom Designer SDL maintains real-time connectivity. This prevents the introduction of unintentional mistakes up front. Instead of only running LVS at the end of the layout phase, which would be much more costly to correct, Custom Designer SDL catches these errors early in the design cycle when it is much easier and less costly to fix. The SDL connectivity model ensures that designers make the correct connections and gives warning of accidental connections.
Follow the Cursor (FTC) Router
Custom Designer’s FTC router is an innovative feature that improves singlenet routing productivity. The layout designer dynamically guides the router with the cursor while getting real-time router feedback showing the actual route in the layout. While following the preferred layer routing direction, the FTC router complies with the DRC rules and the connectivity source. The FTC router also has a “Finish Route” function that will automatically finish the route at any stage during an editing session.
Point to Point (P2P) Router
Custom Designer’s point-to-point (P2P) router is an interactive auto-router that improves productivity while working at a “high altitude.” While following the preferred layer routing direction, the P2P router will automatically route single nets that are DRC- and LVS-correct. The layout designer simply clicks on a source then a destination for a net and the route is completed. P2P can route in single-layer or in multi-layer mode.
P2P can also operate in a “nonconnectivity” mode, enabling pointto- point routing where a connectivity source may not be present.
Both FTC and P2P work with Custom Designer’s Shadow Mode, which clearly highlights the net being routed and helps the designer navigate across a dense layout (see Figure 2). For information about Shadow Mode please see the Custom Designer Layout Editor (LE) data sheet.
Figure 2: FTC working in conjunction with Shadow Mode
Custom Designer SDL significantly reduces the amount of time spent in LVS debugging throughout the entire design phase.
Custom Designer’s Import Layout feature aids designers facing the challenge of developing new design derivatives from existing SDL IP that requires targeting new PDKs and new schematics with the same circuit topology. As shown in Figure 2, the Import Layout command regenerates the design (placement and wiring) from the existing design while maintaining the device/Pcell placement to target a new PDK.
Designer productivity is enhanced because Import Layout preserves as much of the existing design as possible and includes the capability to accommodate changes in transistor sizes from the new schematic.
Once merged with the new PDK, the new design provides a speedy starting point for final edits while maintaining full SDL connectivity.
Users can customize the elaboration rules using the Hierarchy Editor. For example, the user can use the first layout of an amp block for the first instance, use the second layout of the amp block for the second instance, and flatten the layout of the amp block for the third instance.
Advanced SDL Cloning
Custom Designer’s SDL Auto Cloning feature provides designers with an intuitive schematic-to-layout cloning solution with high capacity and performance. This capability will clone circuit sections with the same topology, and users can choose whether the feature will clone only exact transistor size matches, or allow inexact device size matches. The innovative SDL cloning technology enables designers to lay out repetitive circuitry much faster while maintaining full SDL compliance.
SDL Interdigitaion is an intuitive simple approach to interdigitate devices while maintaining device-to-device connectivity from the schematic. The placement is row-based and the ABBA, ABAB and AABB patterns are supported. Dummy device insertion, and cross-coupling of patterns are also supported.
Flight Line Manager
In addition to real-time flight line updates as wires and devices are placed, Custom Designer SDL provides a Flight Line Manager that helps with visualization when working in highlycongested areas. Designers can turn all flight lines on or off or select by individual net if desired, thereby reducing the visual clutter in tight areas.
Figure 3: Layout Import eases PDK updates
SDL Marker Browser
The Marker Browser Assistant displays a variety of useful information as the designer works through the layout placement, wiring and optimization of a design. The SDL Marker Browser provides a detailed description of the errors and potential discrepancies between the schematic and layout views of a given design.
On-the-Fly ECO Repairs
Custom Designer SDL’s “On-the-Fly” ECO capability keeps the schematic and layout views of a design synchronized, even across parameter changes. At any time the user can use the ECO Verify command to find inconsistencies between the schematic and layout and highlight what has changed. The designer can interactively make the changes or use the ECO AutoFix command to automatically correct the design.
The Correspondence Establisher
The Correspondence Establisher provides the ability to change device correspondence either on-canvas using a point-and-click method from layout-to-schematic or from schematic-to-layout or using a tablebased GUI. This enables non-SDL instantiated instances to correspond to schematic elements.
Bidirectional Cross-Probing, Highlighting and Selection
Custom Designer SDL supports full hierarchical cross-probing of instances, pins and nets between the schematic and layout by invoking the SDL Probe command. Dynamic Bidirectional Highlighting mode dynamically crosshighlights the schematic and the layout as the cursor hovers over nets, pins and devices. This works in the schematic as well as the layout.
Figure 4: A block-level design instantiated with SDL working in conjunction with the
Custom Designer LE bus command digitizing 64 bits with real-time connectivity
Legacy Property Support
In the schematic or through the cell level, Custom Designer SDL supports a parameter, lxUseCell, that allows users to specify the logical mapping of library and cell views to physical library and cell views.
The lvsIgnore property lets users ignore certain elements in the schematic that are not used in the layout. Such elements might be terminals or instances, for example.
Device Folding Support
Device folding effectively splits a single layout instance into multiple layout instances using the folding parameter and a threshold value. The threshold value is applied to a device type. If the “w” value on the schematic exceeds this value, the device will split accordingly.
Device chaining aligns instances in a row and opportunistically calls the abutment engine to share common source and drains.
- Platform Support
- X86 for 32- and 64-bit
- Red Hat Enterprise Linux version 4 and 5 (AS, ES, WS)
- SUSE Linux 10 and 11 (AS, ES, WS)
Custom Designer LE 4943-0