This white paper introduces the complexity of power management at the software level for mobile devices by means of Linux and Android. The complexity of hardware power management is mirrored in software. A single defect in the power management scheme can have a catastrophic impact on the standby time of a mobile device. We outline how Synopsys Virtual Prototypes address major challenges in the bring-up and validation of power management software. Furthermore, we introduce how virtual prototypes can be used for software-centric power estimation and analysis.
Achim Nohl, Technical Marketing Manager, Synopsys Inc. and Alan Gibbons, Principal Engineer, Synopsys Inc.

This white paper provides you with the understanding of how custom processors offer the flexibility needed to deal with multiple standards, multiple modes and late design changes as well as help minimize verification effort. By means of specialization, they also offer an attractive trade-off between power, performance and area. This makes them ideal for use in a wide variety of applications including video, audio, security, networking, baseband, control and industrial automation applications.
Achim Nohl, Synopsys Inc. and Tom De Schutter, Synopsys Inc.

This white paper introduces some of the design challenges that may be encountered in designing the physical layer (PHY) for LTE and how Synopsys' DSP algorithm design tools create executable specs to overcome them.
Louie Valena, Corporate Applications Engineer, Nihon Synopsys G.K.

LTE and WiMAX are key contenders for next generation mobile phone system. Both standards are excellent examples to highlight the huge complexity involved in modern communication algorithms. This increasing complexity is the trigger for new design methodologies and tools. This white paper provides a detailed analysis on the elements that determine algorithm design and verification efficiency for LTE and WiMAX communications systems. The concept of efficiency is discussed for modeling, simulation, reuse, and verification. Different methodologies and simulation solutions are then compared, providing the reader with specific algorithm design requirements.
Markus Willems, Ph.D., Product Marketing Manager, Synopsys and Holger Keding, Ph.D., Corporate Application Engineer, Synopsys.

An increasing number of ASIC and FPGA designs are accelerating algorithms and applications directly in hardware (HW) circuits. These HW accelerator cores have become commonplace and are now a key part of product differentiation and the ability to meet market expectations in performance, cost and reliability. However, the implementation and verification of hardware acceleration cores is very difficult, especially due to the growing complexity of standards in video, imaging, wireless, and other multimedia and communications applications. RTL methodologies for IC design and verification are struggling to address this complexity in terms of productivity, available resources and time-to-market.
Chris Eddington Director of Marketing,High-Level Synthesis and System-Level Products,Synopsys, Inc.

Virtualization of Electronic Systems plays an increasingly important role for the design of today’s complex electronic systems. This article introduces the usage and benefits of Virtual Prototypes for debug and analysis during embedded software development.
Achim Nohl, Solution Architect, Synopsys, Inc.

Software is a critical component for the development of USB-based designs. In efforts to start software development early and to make it as productive as possible, design teams are often utilizing virtual and FPGA prototypes for software development prior to silicon. While FPGA prototypes can still be made available prior to silicon, virtual prototypes can be utilized even before RTL is available. This white paper describes how virtual prototype use models for hardware/software verification and the integration of the LeCroy analyzer software into Synopsys' DesignWare SuperSpeed USB verification environments help solve SuperSpeed USB IP development challenges.
Frank Schirrmeister, Director, Product Marketing; Tri Nguyen, R&D Engineer

This white paper provides an in depth look at significant factors to consider when choosing to develop or purchase prototyping hardware. Costs, development time, and effort are considered in detail as well as other factors such as bill-of-materials cost, manufacturing time, and test yield. The paper also provides information on how to request a “Cost Comparison Spreadsheet” which will allow you to explore the various options and make an informed decision for your particular situation.
Synopsys, Inc

In order to boost the utility of an FPGA-based prototyping platform, certain critical components are required, including a high-performance, low latency communication channel and direct access to all pins, signals, nodes and registers within the FPGA. This paper provides an in-depth look at Synopsys’ new UMRBus (Universal Multi-Resource Bus) interface - the unique communications architecture that provides users of HAPS systems with: a built-in mechanism that allows bi-directional data exchange for more efficient debug; co-simulation for fast system bring-up; accelerated transaction-based verification and a physical connection to virtual prototyping environments through standard SCE-MI interfaces.
Heiko Mauersberger Director Engineering, FPGA-Based Prototyping, Synopsys, Inc.

By mandate of the Engineering Meetings Board, this paper has been approved for SAE publication upon completion of a peer review process by a minimum of three (3) industry experts under the supervision of the session organizer.
Thorsten Gerke Synopsys GmbH David Bollati C&S Group/University of Applied Science Wolfenbüttel

By mandate of the Engineering Meetings Board, this paper has been approved for SAE publication upon completion of a peer review process by a minimum of three (3) industry experts under the supervision of the session organizer.
Jeremy Poole and Jim Patton Synopsys, Inc. Bill Goodwin General Motors

By mandate of the Engineering Meetings Board, this paper has been approved for SAE publication upon completion of a peer review process by a minimum of three (3) industry experts under the supervision of the session organizer.
Thorsten Gerke Synopsys GmbH Alkiviadis Boulos Jaguar Land Rover

How can designers maintain high standards and ensure success for these types of demanding designs? The answers are here. This paper first provides brief definitions of key concepts: mission-critical, safetycritical, high-reliability, and high-availability. The paper then considers the various elements associated with the creation of high-reliability and high-availability FPGA designs.
Angela Sutton, Staff Product Marketing Manager, Synopsys

This white paper provides a quantitative summary of the gains realized in Synopsys' USB OTG driver development project through the use of virtual platforms, as well as an outlook of how to apply the lessons learned from the USB OTG driver development to other connectivity IP such as SATA, Ethernet, DDR2 and DDR3.
Frank Schirrmeister, Synopsys, Inc.

Adopting robust design principles is a proven methodology for increasing design reliability. This paper describes how virtual manufacturing was developed using distributed computing.
William Goodwin and Amar Bhatti, General Motors Corporation and Michael Jensen, Synopsys, Inc.

Virtual Platforms are a solution for addressing slipping schedules in software-dominated chip designs. They allow pre-silicon software development and also link effectively to verification and power analysis.
Frank Schirrmeister, Director of Product Marketing Shay Benchorin, Director of Business Development, Filip Thoen, Solutions Architect, Synopsys, Inc.

This paper introduces an automated, simulation-based methodology based on the guidelines and criteria defined in the FlexRay physical layer specification. In addition, this paper shows how close OEMs, IC vendors, conformance testers and software tool vendors must work together to define and realize a robust design methodology that is based on a virtual prototype implementation of the FlexRay network.
Thorsten Gerke, Synopsys GmbH and David Bollati, C&S Group/University of Applied Science Wolfenbüttel