A new modeling methodology is proposed to improve performance validation at an early stage in the design cycle of systems dedicated to handheld devices. Hardware models are typically available early in the chipset development cycle, but software, such as multimedia applications, may not be developed until after the ASIC is designed. An alternative source of simulation stimulus must be found so that hardware models can be exercised in the absence of such software. This paper describes three approaches that overcome this dependency and enable the validation of application processor performance at the architecture stage of silicon design: high-level software models, trace-driven characterization, and statistical traffic models. Correlation between actual measurements and simulation outputs demonstrates that these methods provide adequate accuracy for performance validation.
May 22, 2012

The case for developing and using virtual platforms (VPs) has now been made. If developers of complex HW/SW systems are not using VPs for their current design, complexity of next generation designs demands for their adoption. This paper summarizes a special session focused on the latest applications and latest use cases for VPs. It gives an overview of where this technology is going and the impact on complex system design and verification.
May 22, 2012

Synopsys has been delivering tools to create virtual prototypes for years. The new Virtualizer Development Kit (VDK) is designed to make that process easier. One feature is power debugging, which allows designers to see how power utilization performs for various run modes as well as for application execution. This then allows software developers to experiment with different run/idle management strategies as well as testing applications to see how well they perform.
Apr 14, 2012

Can we achieve the performance levels of the IMT-Advanced global standard for international mobile telecommunications?
Jan 30, 2012

This is the first of a series of articles that will attempt to bring answers together and to provide a comprehensive view of the prototyping space on how EDA vendors categorize prototyping, who creates the models, what are they used for, roadblocks in adoption and their opinions about the future of prototyping. If you are considering inserting a prototype into your design flow, which ones are likely to provide you with the most value and what are the difficulties you can expect to face?
Nov 21, 2011

IEEE announced that the IEEE Standards Association (IEEE-SA) Standards Board has approved a revised version of the IEEE 1666™ "Standard SystemC Language Reference Manual," which specifies SystemC, the high-level design language used in the design and development of electronic systems. The new version of IEEE 1666 encompasses many enhancements, notably the support for transaction-level modeling (TLM), a critical approach to enable higher level and more efficient design of complex integrated circuits (ICs) and system-on-chips (SoCs).
Nov 10, 2011

Synopsys' Multicore Optimization Technology is EDN's hot product of 2011. This technology is meant for performance analysis and early definition of multicore system architectures in SystemC. With Multicore Optimization Technology, users of of Platform Architect can capture HW/SW performance models of multicore system architectures in the early concept phase for robust performance measurement and trade-off analysis, months prior to software availability.
Nov 08, 2011

Part 3 of a roundtable discussion on hardware/software priorities with Neil Hand, group director for marketing for Cadence’s SoC realization; Johannes Stahl, director of product marketing for system-level solutions at Synopsys; Prasad Subramaniam, vice president of design technology at eSilicon; and Bernard Murphy, CTO at Atrenta.
Oct 14, 2011

Part 2 of a roundtable discussion on hardware/software priorities with Neil Hand, group director for marketing for Cadence’s SoC realization; Johannes Stahl, director of product marketing for system-level solutions at Synopsys; Prasad Subramaniam, vice president of design technology at eSilicon; and Bernard Murphy, CTO at Atrenta.
Oct 07, 2011

Part 1 of a roundtable discussion on hardware/software priorities with Neil Hand, group director for marketing for Cadence’s SoC realization; Johannes Stahl, director of product marketing for system-level solutions at Synopsys; Prasad Subramaniam, vice president of design technology at eSilicon; and Bernard Murphy, CTO at Atrenta.
Sep 30, 2011

Automotive OEMs are constantly looking for ways to speed up the development of networked cars. A critical components of these cars - the electronic control units or ECUs - need to be developed and tested quicker and more accurately than ever before. Automotive Industries (AI) spoke to Marc Serughetti, Product Marketing Director, Synopsys, and asked him what challenges face ECU developers.
Sep 19, 2011

In this episode, we talk to Markus Willems, Senior Product Marketing Manager of System-Level Solutions atSynopsys. In addition to talking about the wireless industry and the issues that face design engineers we talk about their collaboration with Rohde & Schwarz to accelerate LTE and LTE-Advanced wireless system design and verification while reducing risk for standards compliance.
Jul 12, 2011

Skyrocketing software development costs, which for years have been "somebody else's problem," are now firmly part of the SoC development teams list of headaches. That has made virtual prototyping far more popular, particularly at 40nm and beyond, where engineers are looking at this approach as a way of managing complexity, doing architectural exploration and even performing very early functional verification using abstract models.
Jun 30, 2011

Virtual prototypes offer software teams a way of creating software somewhat independently of physical hardware (silicon), which can result in a nine to 12-month market advantage. Software teams can start developing code even before the hardware team has produced any RTL. Development teams can use this productivity advantage to get to market faster or allow for more testing time, including corner testing.
Jun 28, 2011

The tools are now mature enough for even risk-averse engineering teams to embrace.
May 24, 2011

Engineers recognized years ago that increasing chip complexity meant they had to move to a higher level of abstraction. The problem has been determining precisely what this 'next level up' is and then making the connection back down to rtl code for physical implementation. A variety of terms has emerged for this process, including electronic system design, esl, sld, behavioral level design and architectural level design.
May 10, 2011

An interview with Charan Langton, Manager of Simulation and Analysis at Loral Space Systems.
Mar 25, 2011

How Texas Instruments' designers used the SystemC hardware design language to do performance modeling when creating both the company's OMAP-2 platform and the devices based on it.
Feb 02, 2011

Prototyping at different stages within a design has become a mainstream methodology and more recently focuses on specifically enabling the design chain from IP providers, semiconductor providers, integrators and OEMs. It plays a key role in those interactions because early prototypes enable communication of requirements from customers to suppliers as well as early software development and verification by suppliers for their customers.
Dec 16, 2010

This article describes our experiences using the Application Modeling and Mapping methodology (AMM) based on commercial tooling from Synopsys. This methodology is valuable at the technical and organizational level for investigating the feasibility of new electronic products.
Sep 26, 2010

Building a system now includes software, but defining the software stack is a mounting challenge for engineers. What used to be almost exclusively drivers now includes RTOSes and OSes, executable files, middleware, firmware, IP, embedded software and applications.
Aug 26, 2010

The processors that are used in embedded systems must fulfil a set of constraints: program execution time, power consumption, chip size, code size and so on. In this paper, we focus on the design of Application Specific Instruction-set processors, and more precisely on an efficient methodology for the Design Space Exploration of an ASIP for the audio and speech domain.
Aug 09, 2010

Battery life has become the Achilles heel for the success of mobile software platforms, such as Android. This article outlines how Virtual Prototypes (VPs) provide all the necessary elements for a debug solution that can spot and remove power related defects from software.
Jul 20, 2010

This paper uses the block floating point format to realize the position estimation algorithm in Global Navigation Satellite System (GNSS) receivers. The precision of this novel approach is quantified by extensive simulations using synthetic as well as real GNSS data. The implementation of the position estimation algorithm using block floating point format on an application specific processor is introduced and compared to implementations on a standard embedded processor and in standard floating point arithmetic in terms of performance and costs.
Jun 09, 2010