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Space Systems/Loral Selects Trusted SPW Tool for Advanced Satellite Receiver Design |
SPW's fast simulation runtime is critical to keeping up project momentum and reducing overall development time. The ability to design an optimal signal processing algorithm in the shortest amount of time with less effort is the most significant benefit SPW offers. Charan Langton,
Manager of Simulation and Analysis ,
Space Systems / Loral |
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InterDigital Designs Standards-Compliant, Flexible HSPA Solution Using SPW Tools and Models |
"For InterDigital the design process determines our success. We needed a modeling methodology covering the needs of the entire interdisciplinary team. We relied on Synopsys' algorithm design solution to put this rigorous process in place." Robert Peloso,
Director, Engineering Management,
InterDigital |
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JAXA – SPW Enables 3-4X Faster Algorithm Design Flow for Modem Design |
"Designing an optimal system in the shortest amount of time, with minimal effort and cost, is the biggest benefit that SPW provides. It would probably take 3-4 times the effort without SPW." Naohiko Iwakiri,
Senior Research Scientist of Tokyo University, and Institute of Space and Astronautical Science ,
JAXA |
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Stellamar – All-Digital ADC a Design Success with SPW Algorithm Design Tool |
"Synopsys is a key partner in helping us innovate. Synopsys SPW gives us the ability and confidence to focus on what differentiates our product and gets us to market faster." Allan Chin,
CEO ,
Stellamar |
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STMicroelectronics – Rapid Delivery of Demodulator IP for Analog TV Standards using Synphony Model Compiler |
By using Synopsys' Synphony Model Compiler we were able to complete our entire validation effort within two weeks and with extremely reliable results. Srevats Laxman,
Technical Leader IP Algorithms ,
STMicroelectronics |
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STMicroelectronics Noida Quickly Achieves Advanced Video Compression with Synphony C Compiler |
"Even with no RTL experience, we were able to complete this complex digital video hardware IP design in 9 months with two engineers." Ravin Sachdeva,
Technical Leader ,
STMicroelectronics |
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STMicroelectronics – High-Level Synthesis Flow Achieves Higher Reliability and Productivity for Multirate Digital IF TV ASIC |
"Synphony Model Compiler really improved our productivity and reliability in designing complex multi-rate DSP algorithm, mixed-signal functions and generated very reliable results." François Rémond,
CAD & Design Methodology Director ,
Home Entertainment & Displays Group, STMicroelectronics |
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Yamaha’s XMP-1 DSP Doubles Functionality While Taping Out Six Months Early with Processor Designer |
"With Processor Designer we doubled functionality for our high definition sound generator, developing it in just one year, including the entire software development toolchain, while reducing cost." Morito Morishima,
Product Development Department Manager, Semiconductor Division ,
Yamaha Corporation |
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Ricoh – Processor Designer’s Automated Flow Enabled Ricoh to Quickly Develop a Custom DSP for Office Automation Products |
Processor Designer provided exactly what we needed - an easy way to create a high quality custom DSP letting us focus on our design expertise rather than RTL and software toolchain implementation details. Sadahiro Kimura,
Senior R&D Engineer ,
Core Technology R&D Center, Ricoh |
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CEVA’s MM3000 Mobile Multimedia Platform Successfully Used Processor Designer for 2 Advanced DSP Designs |
For an advanced and innovative design like the MM3000, Processor Designer was the only tool that offered the needed tool flow integration and flexibility to get to the optimum implementation. Erez Bar-Niv,
CTO ,
CEVA |
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Yokogawa Achieves Industry’s Fastest Programmable Logic Controller Performance with Processor Designer |
Our PLC FA-M3V has now reached the fastest performance in the world. I don't think many system design engineers know that they can develop such a high performance application-specific embedded processor using Processor Designer. Hirofumi Okamoto,
Group Leader of the PLC Development Division ,
Yokogawa Electric Corporation |
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