Low power SoC design is a system design challenge which does not stop at the border between hardware and software. Enabling your system to perform with low power efficiency requires the right SoC architecture and perfectly matching power management software. This seminar introduces new ways for the SoC architect and the software developer to address their SoC power challenges early in the development cycle with virtual prototyping.
Please join Synopsys for a FREE seminar focused on power-aware architecture definition and software development.
Session one will introduce how virtual prototypes enable early quantitative analysis of power and performance trade-offs to determine the right SoC architecture with Synopsys Platform Architect, including:
- How to partition the SoC application into fixed hardware accelerators and software executing on a processors, determining the optimal number and type of each CPU, GPU, DSP and accelerator
- How to partition SoC components into a set of power domains to adjust voltage and frequency at runtime in order to save power when components are not needed
- How to confirm the expected performance/power curve for the optimal architecture
Session two will introduce how virtual prototypes enable the early bring-up and test of power management software and power-aware software development with Synopsys Virtualizer Development Kits (VDKs):
- How virtual prototypes can help to quickly reveal fundamental problems such as a faulty regulation of clock and voltages
- How our unique visibility makes software developers aware of major changes in power consumption
- How real world scenarios can be simulated allowing systematic testing of corner cases typically only revealed in field operation
- Who Should Attend
- System Designers
- SoC Architects
- Software Developers
- Project Managers
Date and Location:
June 10, 2014, Mountain View, CA >> Register Now!