SystemVerilog Books

The Art of Verification with SystemVerilog Assertions	Writing Testbenches Using SystemVerilog	Verification Methodology Manual for SystemVerilog
A Practical Guide for SystemVerilog Assertions	SystemVerilog Assertions Handbook for Formal and Dynamic Verification	1800-2005 IEEE Standard for System Verilog: Unified Hardware Design, Specification and Verification Language
SystemVerilog Golden Reference Guide	SystemVerilog for Verification	SystemVerilog for Verification
SystemVerilog for Design
Japanese-language books
SystemVerilog Assertions Handbook for Formal and Dynamic Verification	Verification Methodology Manual for SystemVerilog	SystemVerilog for Design