Lynx Design System 

• Synopsys Galaxy Implementation Platform Reference Methodologies
• Over 45 built-in methodologies for design optimization, including optimizations for power, area, performance and manufacturability
• Full-chip hierarchical RTL-to-GDSII support
• Validation with multiple standard cell libraries and foundry technology nodes
• Over 60 tape-out specific checks
• Over 50 design metrics automatically captured
• Support for job distribution and data management
• Multi-site/multi-user support
• Full technical support and regular updates to the latest tools and methodologies

The Lynx Design System allows designers to configure and customize tool capabilities and methodologies based on their project needs and integrate third-party tools if necessary. For example, designers can configure Synopsys tools such as DC Ultra™, Design Compiler® Graphical and TetraMAX® ATPG for synthesis and design-for-test. For design planning, designers can configure the flow for multiple voltage domains or virtual flat design. Signal integrity avoidance, DFM and design-for-yield (DFY) optimizations can be done for the place and route step. Multi-corner multi-mode (MCMM) sign-off and advanced formal verification can be done for the chip finishing step. In addition to facilitating tool configuration, the production flow’s modular architecture enables users to easily configure horizontal methodologies that span multiple tools such as UPF-compliant MCMM for low power optimization and analysis, full-chip hierarchical design, etc. The Lynx Design System includes built-in support for concurrent modeling analysis and sign-off throughout the flow including static timing analysis (STA), formal verification, automatic test pattern generation (ATPG) and reliability analysis such as EM and IR drop for power and signal nets.

Embedded in the Lynx Design System are the best design practices for hardening processor cores. This streamlines the procedures used by designers to optimize their core’s performance and power for their chosen process technology.

Lynx Design System’s complete RTL-2-GDSII production flow.

The Lynx Design System’s modular architecture enables it to be customized to a variety of end-user design environments. For example, steps in the production flow are partitioned at key logical hand-off points (synthesis, design planning, place and route, etc.) which makes it easy for users to plug-in custom “sub-flows” as needed.

While the production flow is tuned to deliver superior quality of results with the Synopsys Galaxy Implementation Platform, it can readily incorporate internal or other vendors’ tools into the design flow by updating standard and well understood TCL scripts. Other common Lynx Design System customizations include:

1. Integration of internally developed methodologies and processes for specialized flows and handoff points
2. Automatic tracking of additional custom metrics (e.g., handoff dates, milestones.)
3. Additional tape-out process checks (e.g., critical area analysis that calculates die yield probabilities)
4. Integrating Lynx’s Production Flow into customer’s design infrastructure

The Lynx Design System includes a patented GUI that automates flow creation, configuration and maintenance to improve the productivity of the design team. Intuitive and easy to use, it provides the ability to graphically edit, execute and monitor the flow as a design implementation progresses from RTL to tapeout. Creating a new flow or modifying existing flows is accomplished using intuitive point and click operations. Flat or hierarchical flows, for a single block or for an entire chip, are defined by connecting various tasks together based on their dependencies.


The Lynx Runtime Manager’s graphical representation of an RTL-2-GDSII design flow. This environment enables easy creation, configuration and debug of design flows at multiple levels.

Parallel task execution, design exploration involving multiple runs of the same task,or experimentation of a flow with different parameters are also easily accomplished within Lynx’s Runtime Manager. For example, exploring three different Design Compiler synthesis strategies is as simple as four steps as follows:

1. Right click the task to replicate.
2. Fill in the form with the necessary data.
3. “dc_compile” task has been replicated twice for a total of three “dc_compile” tasks.
4. Finally, make the necessary changes to the compile strategy for the two new tasks as shown in figure and run all three tasks to compare results.

Once defined, the flows can then be executed and their status monitored from within the GUI. Visual reporting of results is immediate. Design tasks can be distributed across a compute farm using industry-standard job distribution tools, speeding the design process.

The Lynx Design System’s Runtime Manager aids in design exploration.

The Lynx Design System provides designers and managers 'on-demand' access to status and trend reports such as quality-of-results (QoR) and resource-related project metrics, like those shown in the figures. Over 60 design metrics are automatically tracked during flow execution and saved within a database for customized reporting requests. User-defined metrics can be also created.

Through the patented Management Cockpit interface, designers and managers have real-time access to all captured project metrics and specified design targets to easily create custom reports, such as:

1. Dashboards that show key project metrics such as frequency, area and power
2. Trend analyses of design progress and comparison to target goals
3. Current design status summary
4. Block level comparisons of qualityof- results (QoR) data
5. Summary of tools and tool versions used in the flow
6. Summary report that compares results of design exploration steps

This is one example of many reports that can be easily generated through Lynx’s Management Cockpit. This report compares different floorplan alternatives, enabling designers to quickly review results and select the best alternative.

Pie-chart reports provide visual display of time spent at each design step, facilitating analysis of design bottlenecks.

A “dashboard” status report provides an instant snapshot of the most important design metrics.

Mismatched, incorrect, or incomplete technology and library files can negatively impact project schedule and designer productivity. The risk is especially high at newer process nodes where technology data is constantly changing. Lynx’s process node configuration plug-ins help give designers a template configuration of tool and flow settings to quickly configure the Lynx flow for their choice of standard cell libraries and memories. Optionally available and deployed through services are pre-validated configurations for commonly-used process nodes, which include process configuration information and representative flow and tool settings for specific foundry nodes to further expedite project start.

The library quality assurance plug-in includes scripts and documentation to configure and pre-test any library and technology files for proper execution in the design flow. These comprehensive data and integration checks help ensure that the incoming data and IP are configured correctly in the context of the design objectives.

Lynx's Adaptive Resource Optimizer (ARO) plug-in helps optimize the design team's compute farm. ARO monitors historical usage patterns of submitted jobs and determines a more optimal value to be used for requesting compute memory resources.

Also available through Synopsys Professional Services are optimized IP design flow plug-ins. These optional plug-ins accelerate time to optimized results for advanced processor cores by providing tuned flow scripts, optimized timing and DFT constraints, floorplans and placement guidance, IP-specific tool settings, and design and floorplan exploration and comparative analysis flows.

Adaptive Resource Optimizer (ARO) is a compute farm optimization feature in Synopsys’ Lynx Design System. ARO monitors usage patterns of submitted jobs and determines a more optimal value to be used for reserving compute resources (e.g., memory, CPUs) of future job submissions based on historical use data.

ARO can substantially reduce job pending time (i.e., the time a job sits in queue waiting for a resource) and improve compute farm utilization by ensuring that jobs are assigned to the best queue/machine combination. The busier the compute farm, the greater the benefit realized from ARO compared to traditional fixed resource management practices. Improvements of 10% or more in each job's turnaround time - the time it takes form job submission to getting results - can be achieved using ARO. When aggregated across 1000's of jobs, ARO significantly improves the productivity of the design team.

ARO currently supports LSF, SGE and UGE but can be adapted for proprietary environments as well.

ARO: Adapative Resource Optimizer