Lynx Design System Datasheet

Overview
The Lynx Design System is a highly integrated, production-ready, chip implementation platform that is architected for rapid, “out-of-the-box” deployment to one or multiple project sites. It combines an open, tape-out proven RTL-to-GDSII design flow, GUI-based runtime automation, design metrics capture and reporting and a subsystem that automates the configuration of pre-validated foundry data. The Lynx Design System takes full advantage of the comprehensive Synopsys Galaxy™ Implementation Platform, but is flexible to readily accommodate internal or third–party tools.

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Lynx Diagram

Key benefits

Lynx Diagram 2
Figure 2: Lynx’s Production Flow.

Advanced, RTL-to-GDSII design flow and sub-flows
The Production Flow (Figure 2) embedded in the Lynx Design System is built on a leading-edge design ﬂow that is tape-out proven on over a 100 designs in a wide range of applications. It is in use from older nodes to 32/28nm manufacturing processes. This complete, hierarchical RTL-to-GDSII implementation ﬂow includes:

Synopsys Galaxy Implementation Platform Reference Methodologies
ARM-Synopsys iRM’s optimized for power, performance and area
Over 45 optimized methodologies built-in, from power management to DFM/DFY
Full chip hierarchical RTL-to-GDSII support
Tested with multiple foundries, libraries and technology nodes
Over 60 tape-out specific checks
Over 50 design metrics automatically captured
Support for job distribution and data management
Multi-site/multi-user support enabled out-of-the-box
Fully supported and regularly updated for latest methods

The Lynx Design System allows designers to conﬁgure and customize tool capabilities and methodologies based on their project needs and integrate third-party tools if necessary. For example, designers can configure Synopsys tools such as DC Ultra™, Design Compiler® Graphical and TetraMAX® ATPG for synthesis and design-for-test. For design planning, designers can conﬁgure the ﬂow for multiple voltage domains or virtual ﬂat design. Signal integrity avoidance, DFM and design-for-yield (DFY) optimizations can be done for the place and route step. Multi-corner multi-mode (MCMM) sign-off and advanced formal veriﬁcation can be done for the chip ﬁnishing step.

In addition to tool conﬁguration, the Production Flow’s modular architecture enables users to easily conﬁgure horizontal methodologies such as UPF-compliant MCMM for low power optimization and analysis, full-chip hierarchical design, etc., that span multiple tools. The Lynx Design System includes built-in support for concurrent modeling analysis and signoff throughout the ﬂow including static timing analysis (STA), formal veriﬁcation, automatic test pattern generation (ATPG) and reliability analysis such as EM and IR drop for power and signal nets.

Embedded in Lynx are the best design practices from the ARMSynopsys implementation Reference Methodologies (iRM) using ARM physical IP optimized for ARM processors. The iRM streamlines the procedures used by designers to target ARM processors to their chosen technology nodes by delivering a comprehensive solution proven by ARM and Synopsys to enable outstanding performance and energy efﬁciency. Additionally, the Lynx Design System incorporates Synopsys tool methodologies, such as Design Compiler and IC Compiler reference methodologies, allowing designers to get their designs into production as quickly and efficiently as possible.

The Production Flow in Lynx is continuously updated to support the latest tool releases and design methodologies, ensuring designers are taking maximum advantage of their EDA tool investment.

Lynx Diagram 3
Figure 3: Drag and drop interface for creating and modifying flows.

Runtime Manager for easy flow configuration, execution and monitoring
The Lynx Design System includes an intuitive and easy-to-use GUI which enables rapid configuration of the encapsulated methodologies into a customized flow. It also includes the ability to graphically execute and monitor the flow(s) as a design progresses through the entire RTL-to- GDSII process, or subsets of the flow.

With the Runtime Manager, creating a new flow or modifying existing flows is accomplished using intuitive drag and drop operations in the flow diagrams, as shown in Figure 3. Flat or hierarchical flows for a single block or for an entire chip are defined by connecting various tasks together based on their dependencies. Parallel task execution and design exploration involving multiple invocations of the same task or flow with different parameters are also easily specified. Once defined, these flows can then be executed and their status monitored from within the Runtime Manager. These designs tasks can be distributed across a compute farm using industry-standard job distribution tools.

The Runtime Manager includes other productivity-enhancing features such as a command-line interface and color-coded ‘Running/Completed/ Error’ task status monitoring as shown in Figure 4. This intuitive visualization capability quickly highlights errors as the design progresses through the flow. Once a problem is identified, debug is easier as designers can inspect report and log files within the GUI and launch tools to view or edit the design in the correct context.

Lynx Diagram 4
Figure 4: Flow execution status is identified through our color-coded status monitoring.

Management Cockpit delivers greater project visibility and higher predictability
The browser-based Management Cockpit provides designers and managers platform-independent, ‘on-demand’ access to quality-ofresults (QoR) and resource-related project metrics. Over 50 metrics are automatically acquired in a database by the Lynx Design System during flow execution, and additional user-defined metrics can be defined. Examples of metrics pre-configured for capture in Lynx include:

Chip/block area, width and height
Cell utilization
Number of instances and logic gates
Number of clock and voltage domains
Number of HVT, LVT and RVT cells
Min/Max Worst-case Negative Slack (WNS)
Min/Max Total Negative Slack (TNS)
Clock skew and clock latency
Total, leakage and dynamic power
DRC and LVS errors
ATPG fault coverage
Run time, memory usage and CPU usage by task

The Management Cockpit’s reporting GUI facilitates access to all captured project metrics and enables users to specify their design targets to simplify the checking of design status (Figure 5). Through an intuitive user interface, managers and designers can easily create custom reports such as:

Dashboards that show key project metrics such as frequency, area and power
Trend analyses of design progress and comparison to target goals
Current design status summary
Block level comparisons of QoR results
Summary of tools and tool versions used in the flow

The Management Cockpit provides a web-accessible tool for project leads, design management and senior executives to share a consistent, accurate and real-time view of their project status. This critical data enables informed and timely decisions to be made as necessary through the course of the program to optimize use of resources and achieve desired goals.

Lynx Diagram 5
Figure 5: Management Cockpit reports.

Accelerating project start and tape-out with Foundry- Ready System
Mismatched, incorrect, or incomplete technology and library files can negatively impact project schedule and designer productivity. The risk is especially high at newer process nodes, where technology data is constantly changing. Lynx’s Foundry-Ready System helps address these early design impediments by providing tools to validate technology and foundry data in Lynx’s Production Flow. The Foundry-Ready System includes scripts and documentation necessary to pre-test libraries and technology files and configure them for proper design flow execution.

Upon initial Lynx deployment, Synopsys will show you how to configure the Foundry-Ready System for your specific technology node, enabling you to:

The Foundry-Ready System also improves tape-out quality with embedded foundry “tape-in” criteria. It integrates process-specific methodologies such as metal fill and via optimization and representative settings like on-chip variation (OCV) into the design flow. Through a combination of automated checks, documented guidelines and post-GDSII reports, the Foundry-Ready System helps facilitate first-time-right, manufacturing-ready design submissions.

Open architecture facilitates integration with your specific design environment
The Lynx Design System’s modular architecture enables it to be customized to a variety of end-user design environments. For example, steps in the production flow are partitioned at key logical handoff points (synthesis, design planning, place and route, etc.) which make it easy for customers to plug-in custom “sub-flows” as needed. While Lynx’s Production Flow is tuned to deliver superior quality of results with the Synopsys Galaxy Implementation Platform, it can readily incorporate internal or other vendors’ tools into the design flow by updating standard and well understood TCL scripts and makefiles.

Other common Lynx Design System customizations include:

Conclusion
The Lynx Design System is a highly integrated, production-ready SoC development platform delivering a streamlined path to tape-out. Based on proven flows, it eases new technology adoption and enables designers to work smarter and faster, delivering higher productivity and project predictability.