Lynx Design System Datasheet

Overview
The Lynx Design System is a chip design environment that delivers a production-proven design flow with innovative visualization capabilities to help you create and track your design all the way from RTL through GDSII. Developed by chip designers for chip designers, the Lynx Design System leverages a tapeout-validated implementation flow based on the industry-leading Synopsys Galaxy Implementation Platform.

The Lynx Design System encapsulates the collective experience of Synopsys and its foundry and third-party IP partners through established flows and recommended tool settings, enabling rapid set-up and ease-of-use for design teams of all sizes. The Lynx Design System automates the configuration of pre-validated foundry data to accelerate project start and embeds technology-specific checks to streamline tapeout to the foundry. The Lynx Design System is an open environment that readily accommodates customers' internal or third-party vendor tools.

Lynx Diagram
Figure 1: The Lynx Design System is comprised of an RTL-to-GDSII production flow with the latest design methodologies built-in, the Foundry-Ready System to accelerate project start and completion, and two unique graphical

Key benefits

Lynx Diagram 2
Figure 2: Lynx Design System's complete RTL-2-GDSII production flow.

The Lynx Design System's patented visualization technology for design creation, data capture and project metrics reporting creates an environment that enhances the efficiency of designers and program managers alike.

Leading-Edge, Production- Proven RTL-to-GDSII Design Flow
The hierarchical production-ready flow (Figure 2) included in the Lynx Design System incorporates a leading-edge design flow validated with over a 100 tapeouts covering a wide range of applications and manufacturing processes.

This complete, RTL-to-GDSII implementation ﬂow includes:

Synopsys Galaxy Implementation Platform Reference Methodologies
Over 45 built-in methodologies for design optimization, including optimizations for power, area, performance and manufacturability
Full-chip hierarchical RTL-to-GDSII support
Validation with multiple standard cell libraries and foundry technology nodes
Over 60 tape-out specific checks
Over 50 design metrics automatically captured
Support for job distribution and data management
Multi-site/multi-user support
Full technical support and regular updates to the latest tools and methodologies

The Lynx Design System allows designers to conﬁgure and customize tool capabilities and methodologies based on their project needs and integrate third-party tools if necessary. For example, designers can configure Synopsys tools such as DC Ultra™, Design Compiler® Graphical and TetraMAX® ATPG for synthesis and design-for-test. For design planning, designers can conﬁgure the ﬂow for multiple voltage domains or virtual ﬂat design. Signal integrity avoidance, DFM and design-for-yeld (DFY) optimizations can be done for the place and route step. Multi-corner multi-mode (MCMM) sign-off and advanced formal veriﬁcation can be done for the chip ﬁnishing step.

In addition to facilitating tool configuration, the production flow's modular architecture enables users to easily configure horizontal methodologies that span multiple tools such as UPF-compliant MCMM for low power optimization and analysis, full-chip hierarchical design, etc. The Lynx Design System includes builtin support for concurrent modeling analysis and sign-off throughout the flow including static timing analysis (STA), formal verification, automatic test pattern generation (ATPG) and reliability analysis such as EM and IR drop for power and signal nets. Embedded in the Lynx Design System are the best design practices for hardening processor cores. This streamlines the procedures used by designers to optimize their core's performance and power for their chosen process technology.

GUI-based Design Creation
The Lynx Design System includes a patented GUI that automates flow creation, configuration and maintenance to improve the productivity of the design team. Intuitive and easy to use, it provides the ability to graphically edit, execute and monitor the flow as a design implementation progresses from RTL to tapeout.

Lynx Diagram 3
Figure 3: The Lynx Runtime Manager's graphical representation of an RTL-2-GDSII design flow. This environment enables easy creation, configuration and debug of design flows at multiple levels.

Creating a new flow or modifying existing flows is accomplished using intuitive point and click operations. Flat or hierarchical flows, for a single block or for an entire chip, are defined by connecting various tasks together based on their dependencies (Figure 3). Parallel task execution, design exploration involving multiple runs of the same task, or experimentation of a flow with different parameters are also easily accomplished within Lynx's Runtime Manager.

For example, exploring three different Design Compiler synthesis strategies is as simple as four steps (see Figure 4) as follows:

Right click the task to replicate.
Fill in the form with the necessary data.
"dc_compile" task has been replicated twice for a total of three "dc_compile" tasks.
Finally, make the necessary changes to the compile strategy for the two new tasks as shown in figure 4 and run all three tasks to compare results.

Lynx Diagram 4
Figure 4: The Lynx Design System's Runtime Manager aids in design exploration.

Once defined, the flows can then be executed and their status monitored from within the GUI. Visual reporting of results is immediate. Design tasks can be distributed across a compute farm using industry-standard job distribution tools, speeding the design process.

Lynx Diagram 5
Figure 5: This is one example of many reports that can be easily generated through Lynx's Management Cockpit. This report compares different floorplan alternatives, enabling designers to quickly review results and select the best alternative.

On-Demand Design Status and Trend Reporting
The Lynx Design System provides designers and managers 'on-demand' access to status and trend reports such as quality-of-results (QoR) and resource related project metrics, like those shown in Figures 5, 6 and 7. Over 60 design metrics are automatically tracked during flow execution and saved within a database for customized reporting requests. User defined metrics can be also created.

Lynx Diagram 6
Figure 6: Pie-chart reports provide visual display of time spent at each design step, facilitating analysis of design bottlenecks.

Through the patented Management Cockpit interface, designers and managers have real-time access to all captured project metrics and specified design targets to easily create custom reports, such as:

Dashboards that show key project metrics such as frequency, area and power
Trend analyses of design progress and comparison to target goals
Current design status summary
Block level comparisons of quality-of-results (QoR) data
Summary of tools and tool versions used in the flow
Summary report that compares results of design exploration steps

Lynx Diagram 7
Figure 7: A "dashboard" status report provides an instant snapshot of the most important design metrics.

Adaptive Resource Optimizer
Adaptive Resource Optimizer (ARO) is a compute farm optimization feature in Synopsys' Lynx Design System. ARO monitors usage patterns of submitted jobs and determines a more optimal value to be used for reserving compute resources (e.g., memory, CPUs) of future job submissions based on historical use data. When the same job is submitted, ARO will dynamically modify the resource reservation before it is submitted to the compute farm. ARO can also be configured to dynamically submit jobs to specific queues based on the computed memory and/or job runtime values. ARO can substantially reduce job pending time (i.e., the time a job sits in queue waiting for a resource) thereby improving job turnaround time - the time it takes form job submission to getting results - can be achieved using ARO. ARO also improves compute farm utilization by ensuring that jobs are assigned to the best queue/machine combination.

Lynx Diagram 8
Figure 8: Adaptive Resource Optimizer: A Compute Farm Resource Optimization Engine

Foundry-Ready System Accelerates Project Start and Tapeout
Mismatched, incorrect, or incomplete technology and library files can negatively impact project schedule and designer productivity. The risk is especially high at newer process nodes where technology data is constantly changing. The Lynx Design System helps address these early design impediments by encapsulating the collective experience of Synopsys and its foundry and third-party IP partners in recommended tool settings and pre-validated technology data. Lynx's Foundry-Ready System includes the scripts and documentation necessary to configure and pre-test any library and technology files for proper execution in the design flow. These comprehensive data and integration checks help ensure that the incoming data and IP are correct, configured correctly in the context of the design objectives.

Open Architecture Facilitates Integration With Your Design Environment
The Lynx Design System's modular architecture enables it to be customized to a variety of end-user design environments. For example, steps in the production flow are partitioned at key logical handoff points (synthesis, design planning, place and route, etc.) which makes it easy for users to plug-in custom "sub-flows" as needed. While the production flow is tuned to deliver superior quality of results with the Synopsys Galaxy Implementation Platform, it can readily incorporate internal or other vendors' tools into the design flow by updating standard and well understood TCL scripts.

Other common Lynx Design System customizations include:

Conclusion
The Lynx Design System is a highly integrated, production-ready SoC development platform that delivers a streamlined path to tape-out. Based on proven flows, it eases new technology adoption and enables designers to work smarter and faster on their primary task of delivering differentiated designs on spec and on schedule.