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Karen Bartleson shares her perspective on what’s going on in the standards arena.
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Oticon Standardizes on Synopsys Low Power Implementation Solution
Synopsys and Samsung Deliver a Complete Solution for 20-Nanometer Node
Synopsys Design Implementation Tools Receive TSMC 20nm Phase I Certification
Samsung Electronics Tapes out Gigahertz+ ARM Cortex-A15 Processor with Synopsys....
CSR Selects Synopsys for Advanced-Node SoC Design
Industry Leaders Achieve Significant Power and Performance Gains With Synopsys'....
Synopsys Low Power Solution Accelerates Time to Market for CYIT's 3G Mobile IC
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Optimizing IP for Power
The Power Game
Version Control
High Performance and Low Power Design: Tradeoff or Co-Existence?
Considerations for Writing UPF for a Hierarchical Flow
Guest Editorial: Low Power is Everywhere
Insight Article Technology Update: Reducing Power with Advanced Synthesis
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XOR Self-Gating
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A Hierarchical, Low Power Design Approach for Gigascale Designs
Verifying Advanced Low Power Designs
Static Verification of Advanced Low Power Designs
Simplifying Hierarchical LP Verification with Formality
Accurate Early Stage Power Estimation with PrimeTime PX
5X Faster PrimeTime Multivoltage Timing Signoff
Low Power Design Made Easy
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Low Power Video Series
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Eight short videos describing power intent concepts and constructs
Godwin Maben: Low Power Trends and Methodology
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