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Eclypse Low Power Solution

Low Power. Low Risk.

Building on more than 10 years of design leadership, the Eclypse™ Low Power Solution delivers leading-edge, silicon-proven, advanced low power technologies in an easy-to-use, highly automated environment. The perfect alignment of technology, methodology, IP, services, and industry standards, the Eclypse Low Power Solution is a comprehensive portfolio that spans the entire flow, from early architectural analysis through design sign-off. By simplifying the deployment of low power techniques, such as MTCMOS, MCMM, DVFS, the Eclypse Low Power Solution brings advanced low power design to the masses.
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ECLYPSE LOW POWER SOLUTION DATASHEET(PDF)

Solution
Overview

System-Level Design
Low Power System-Level Design: Architecture and Power Analysis more

Productive Integrated SystemC Development Environment (IDE) and reference examples for low power instrumented virtual platforms for software development

Intellectual Property
DesignWare Power-Optimized IP and minPower Components more

A comprehensive portfolio of high-performance, low power IP that enables designers to quickly integrate proven IP into SoCs

Verification
Low Power Verification: Functional and Analog-Mixed Signal more

Advanced analog and voltage-aware digital simulation tools used to validate functionality and impact of effects such as leakage and dynamic power.

Design
Low Power Design: Implementation, Sign-Off and Test more

A complete power management and power integrity sign-off solution for power-efficient design.

Methodologies & Standards
Methods and Industry Standards for Low Power Design

	LPMM	The Low Power Methodology Manual, co-authored by Synopsys and ARM, is a widely adopted, comprehensive guide to low power design implementation.

	SystemVerilog	SystemVerilog (IEEE 1800) is the industry's first unified hardware description and verification language (HDVL) standard.

	VHDL	VHDL (IEEE 1076.1) is a hardware description language for the simulation of analog, digital, and mixed-signal systems.

	UPF	The Unified Power Format (IEEE 1801) is an industry-standard language used to describe low power design intent for verification, implementation, sign-off and test.

	VMM-LP	The Verification Methodology Manual for Low Power is an extension to the proven Low Power Methodology Manual (LPMM) focusing on verification.

	SystemC	SystemC™ (IEEE 1666) is a language built in standard C++ by extending the language with the use of class libraries.

Services
Services to Accelerate Low Power Design

	Design Services	Synopsys Professional Services provides a proven team of low power design and methodology experts

	Training & Support	From online to on-site, Synopsys training and support enables users to become low power design experts.

Low Power Problem
Designers today face a challenging set of conflicting priorities: Reduce power and cost while increasing performance and functionality. Engineer can no longer rely on shrinking geometries below 1µm to reduce power. Advanced low power design techniques can dramatically reduce power consumption but have traditionally required ad-hoc, manual verification and implementation approaches. A major shift in how engineers create and verify chips is now required.

Eclypse Low Power Solution
The Eclypse Low Power Solution supports the industry-standard Unified Power Format (UPF) language, which is used to capture low power design requirements. Spanning the entire flow, the foundation of the Eclypse Low power solution is built upon the following technologies:

System-Level: Innovator, DesignWare® System-Level Library
Intellectual Property: DesignWare® IP
Verification: MVRC™ and VCS® with MVSIM™, Formality, HSIM®, HSPICE and NanoSim
Implementation: DC Ultra™, Design Compiler® Graphical, Power Compiler™, TetraMAX®, DFT MAX™, IC Compiler
Sign-Off: PrimeTime®. and PrimeRail™
Methodology: The "Low Power Methodology Manual" (LPMM), the “Verification Methodology Manual for Low Power” (VMM-LP)
Standards: SystemC, SystemVerilog, VHDL, UPF
Services: Synopsys Professional Services, including Pilot Design Environment