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Jun 23, 2014Synopsys Announces HAPS Connect Program to Speed Creation of HAPS FPGA-Based Prototypes
New Program Provides Prototypers with Daughter Boards and Services from Synopsys-Approved Third Party Providers

Feb 12, 2014Synopsys, Realtek and UMC Collaborate on Industry’s First Single-Chip Ultra High Definition Smart TV SoC
Realtek's Chip Achieves First-Pass Silicon Success Using Broad Portfolio of DesignWare Logic Libraries and Embedded Memories in UMC's 40-nm Process

Dec 09, 2013Abilis Systems Achieves First-Pass Silicon Success with DesignWare ARC Processors, Interface IP and Synopsys Professional Service
Silicon-Proven DesignWare IP, Lynx Design System and Consulting Services Reduce Integration Risk and Reduce Time-to-Market by Three Months

Jun 19, 2013OCZ Technology Group Achieves First-Pass Silicon Success with DesignWare IP and Synopsys Professional Services
Silicon-Proven DesignWare IP and Consulting Services Reduce Integration Risk and Help Accelerate Deployment of Complete SoC Design Flow

Mar 21, 2013ARM and Synopsys Deliver Optimized Reference Implementations
ARM and Synopsys Collaborate to Deliver Optimized Reference Implementations for ARM Processors Optimized Methodologies for ARM's Cortex-A15, Cortex-A7 and CCI-400 Solutions Help Designers Achieve Processor Performance and Power Objectives Faster March 21, 2013

Aug 28, 2012ARM and Synopsys Expand Collaboration
ARM and Synopsys Expand Collaboration to Optimize Power and Performance, and Accelerate Design and Verification for ARM Technology-based SoCs

Jun 26, 2012SMIC and Synopsys Extend 40nm Low Power Capabilities with Reference Flow 5.0
This production-proven flow incorporates a broad range of automated low power and high-performance capabilities through Synopsys' entire tool suite, giving SMIC customers the differentiated performance and power results needed in today's chip designs.

Mar 22, 2011Wilocity Tapes-Out Multi-Gigabit Wireless Communication SoC Using Synopsys DesignWare IP
High-quality DesignWare IP Combined with Professional Services Speeds Development Time and Lowers Integration Risk for Wireless Gigabit Alliance SoC

Nov 15, 2010Synopsys and SMIC Team to Deliver Proven SoC Design Solution for 65-nm to 40-nm Process Nodes
Joint Solution Enables Amlogic to Meet Aggressive Performance and Time-to-Market Goals

Jun 09, 2010Synopsys Delivers Comprehensive Design Enablement for TSMC 28-nm Process Technology with Reference Flow 11.0
Addition of System-Level and In-Design Technology Support Further Enables a Path to Optimized Silicon

Aug 03, 2009Rockchip Collaborates with Synopsys and Chartered to Achieve First-Pass Silicon Success
Rockchip Utilizes Chartered's 65nm Process and Synopsys' Technology and Services Portfolio For Tapeout of Next-Generation Multimedia SoC

Jul 22, 2009Synopsys Galaxy Implementation Platform Supports TSMC 28-Nanometer Process Technology with Reference Flow 10.0
Advanced Design Rule Support, Enhanced Low Power Automation, and New In-Design Manufacturing Compliance Capabilities Enable an Optimized Path to 28-nanometer Silicon

Jun 23, 2009SMIC and Synopsys Announce Availability of Reference Flow 4.0
Flow addresses critical low power challenges of 65-nanometer designs with Synopsys' Eclypse Low Power Solution

Sep 23, 2008Synopsys Announces the Tapeout of NEC Electronics' Latest EMMA System LSI Using IC Compiler
Successful Tapeout of Large 7-Million-Instances Design was Critical in Meeting NEC Electronics' Time-to-Market Requirements

Jun 09, 2008Synopsys Delivers 45-Nanometer Low Power Reference Flow for Common Platform Technology Validated with ARM Physical IP
Comprehensive Flow Enhanced with Integration of Eclypse Low Power Solution Enabled by Unified Power Format

Jun 09, 2008Synopsys and UMC Release 65-Nanometer Low Power Design Flow Enabled by the Unified Power Format
Power management capabilities enhanced with integration of Eclypse Low Power Solution

Jun 04, 2008Synopsys Delivers Comprehensive Design Support for TSMC 40-Nanometer Process
TSMC and Synopsys Address Low Power and DFM Challenges with Reference Flow 9.0

Jun 02, 2008Oticon Tapes Out Innovative Hearing-Aid DSP Using Synopsys IC Compiler
IC Compiler Enables Extremely Low-Power Design for Innovative Medical Device

Feb 26, 2008Synopsys and SMIC Deliver Enhanced 90-Nanometer Reference Flow to Reduce IC Design and Test Costs
Latest Design Flow Streamlines Development and Testing of Low Power Systems-on-a-Chip

Sep 25, 2007Dubai Silicon Oasis Chooses Synopsys to Establish First IC Design Center in the United Arab Emirates
Synopsys Technology and Expertise Help Set Up Design Center To Serve Customers Worldwide

Jul 09, 2007Teradici Corporation Selects Synopsys to Help Deliver Breakthrough PC-Over-IP Technology
Synopsys Tools, IP and Services Enable First-Silicon Success for Teradici's Complex SoC

Jun 04, 2007Synopsys Announces Advanced Techniques In TSMC Reference Flow 8.0 to Address 45nm Design Challenges
Flow Includes Statistical Timing Analysis for Intra-die Variation, Automated DFM Hot-spot Fixing and New Dynamic Low-power Design Methodologies.

Apr 05, 2007Synopsys' Reference Flow For Common Platform Technology Wins Prestigious IBM Beacon Award
Complete 65-Nanometer Design Flow Recognized as Common Platform Technology Critical Success Factor

Mar 28, 2007Synopsys IC Compiler Enables Fully Automated 65-Nanometer Implementation Flow for ARM Cortex-A8 Processor
Flow Delivers a 5-10X Boost in Productivity for Mobile and Consumer Applications




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