| Mar 21, 2013 | ARM and Synopsys Deliver Optimized Reference Implementations
ARM and Synopsys Collaborate to Deliver Optimized Reference Implementations for ARM Processors
Optimized Methodologies for ARM's Cortex-A15, Cortex-A7 and CCI-400 Solutions Help Designers Achieve Processor Performance and Power Objectives Faster
March 21, 2013
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| Aug 28, 2012 | ARM and Synopsys Expand Collaboration
ARM and Synopsys Expand Collaboration to Optimize Power and Performance, and Accelerate Design and Verification for ARM Technology-based SoCs
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| Jun 26, 2012 | SMIC and Synopsys Extend 40nm Low Power Capabilities with Reference Flow 5.0
This production-proven flow incorporates a broad range of automated low power and high-performance capabilities through Synopsys' entire tool suite, giving SMIC customers the differentiated performance and power results needed in today's chip designs.
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| Mar 22, 2011 | Wilocity Tapes-Out Multi-Gigabit Wireless Communication SoC Using Synopsys DesignWare IP
High-quality DesignWare IP Combined with Professional Services Speeds Development Time and Lowers Integration Risk for Wireless Gigabit Alliance SoC
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| Nov 15, 2010 | Synopsys and SMIC Team to Deliver Proven SoC Design Solution for 65-nm to 40-nm Process Nodes
Joint Solution Enables Amlogic to Meet Aggressive Performance and Time-to-Market Goals
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| Jun 09, 2010 | Synopsys Delivers Comprehensive Design Enablement for TSMC 28-nm Process Technology with Reference Flow 11.0
Addition of System-Level and In-Design Technology Support Further Enables a Path to Optimized Silicon
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| Aug 03, 2009 | Rockchip Collaborates with Synopsys and Chartered to Achieve First-Pass Silicon Success
Rockchip Utilizes Chartered's 65nm Process and Synopsys' Technology and Services Portfolio For Tapeout of Next-Generation Multimedia SoC
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| Jul 22, 2009 | Synopsys Galaxy Implementation Platform Supports TSMC 28-Nanometer Process Technology with Reference Flow 10.0
Advanced Design Rule Support, Enhanced Low Power Automation, and New In-Design Manufacturing Compliance Capabilities Enable an Optimized Path to 28-nanometer Silicon
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| Jun 23, 2009 | SMIC and Synopsys Announce Availability of Reference Flow 4.0
Flow addresses critical low power challenges of 65-nanometer designs with Synopsys' Eclypse Low Power Solution
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| Sep 23, 2008 | Synopsys Announces the Tapeout of NEC Electronics' Latest EMMA System LSI Using IC Compiler
Successful Tapeout of Large 7-Million-Instances Design was Critical in Meeting NEC Electronics' Time-to-Market Requirements
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| Jun 09, 2008 | Synopsys Delivers 45-Nanometer Low Power Reference Flow for Common Platform Technology Validated with ARM Physical IP
Comprehensive Flow Enhanced with Integration of Eclypse Low Power Solution Enabled by Unified Power Format
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| Jun 09, 2008 | Synopsys and UMC Release 65-Nanometer Low Power Design Flow Enabled by the Unified Power Format
Power management capabilities enhanced with integration of Eclypse Low Power Solution
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| Jun 04, 2008 | Synopsys Delivers Comprehensive Design Support for TSMC 40-Nanometer Process
TSMC and Synopsys Address Low Power and DFM Challenges with Reference Flow 9.0
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| Jun 02, 2008 | Oticon Tapes Out Innovative Hearing-Aid DSP Using Synopsys IC Compiler
IC Compiler Enables Extremely Low-Power Design for Innovative Medical Device
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| Feb 26, 2008 | Synopsys and SMIC Deliver Enhanced 90-Nanometer Reference Flow to Reduce IC Design and Test Costs
Latest Design Flow Streamlines Development and Testing of Low Power Systems-on-a-Chip
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| Sep 25, 2007 | Dubai Silicon Oasis Chooses Synopsys to Establish First IC Design Center in the United Arab Emirates
Synopsys Technology and Expertise Help Set Up Design Center To Serve Customers Worldwide
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| Jul 09, 2007 | Teradici Corporation Selects Synopsys to Help Deliver Breakthrough PC-Over-IP Technology
Synopsys Tools, IP and Services Enable First-Silicon Success for Teradici's Complex SoC
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| Jun 04, 2007 | Synopsys Announces Advanced Techniques In TSMC Reference Flow 8.0 to Address 45nm Design Challenges
Flow Includes Statistical Timing Analysis for Intra-die Variation, Automated DFM Hot-spot Fixing and New Dynamic Low-power Design Methodologies.
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| Apr 05, 2007 | Synopsys' Reference Flow For Common Platform Technology Wins Prestigious IBM Beacon Award
Complete 65-Nanometer Design Flow Recognized as Common Platform Technology Critical Success Factor
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| Mar 28, 2007 | Synopsys IC Compiler Enables Fully Automated 65-Nanometer Implementation Flow for ARM Cortex-A8 Processor
Flow Delivers a 5-10X Boost in Productivity for Mobile and Consumer Applications
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| Mar 27, 2007 | Synopsys Enables STMicroelectronics to Achieve First-Silicon Success for 65-nm Dual High-Definition MPEG-4 Decoder
Comprehensive Implementation, System-Level and Verification Solutions Speed Time-to-Market for STi7200 Dual-Video-Stream Device
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| Jan 29, 2007 | Synopsys Named IBM-Authorized Power Architecture Design Center
Synopsys to Directly License Foundry-Portable PowerPC Cores
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| Oct 13, 2006 | Hua Hong NEC and Synopsys Jointly Develop Reference Design Flow 2.0
Hua Hong NEC Chooses Synopsys as Primary EDA Provider
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| Sep 05, 2006 | SMIC and Synopsys Deliver Reference Design Flow 3.0 for 90-Nanometer Designs
Reference Design Flow Features New Low Power and DFM Capabilities Based on Synopsys' Galaxy™ Design and Discovery ™ Verification Platforms
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