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At-A-Glance

• Develop FPGA-based prototyping methodology for your ASIC design flow
• Map ASIC-targeted RTL to HAPS™ hardware
• Optimize setup for RTL debug and software development

Enabling Early System and Software Development
Synopsys’ FPGA-Based Prototyping solution provides a tightly integrated and comprehensive FPGA-Based Prototyping flow for at-speed verification of FPGAs and ASICs. Synopsys’ FPGA-Based Prototyping software and hardware are ideal for IP and SoC design and verification teams who want to take advantage of advanced FPGA devices to quickly prototype their ASIC.

Synopsys consultants provide the expertise in methodology and implementation to help deploy an FPGA-Based Prototyping flow that can efficiently map your ASIC targeted RTL to Synopsys’ HAPS™ hardware. Our engineers work collaborate with your design team to define the flow and assist with the prototype implementation. The focus is to create a robust, reusable prototyping flow which puts your SoC design into actual hardware and enables “real world” testing and software integration in advance of ASIC availability.

Synopsys’ FPGA-Based Prototyping services include assistance with:

• Developing your prototyping methodology
• Test environment development and integration assistance
• Adapting your ASIC-targeted RTL for FPGA(s) (e.g., migrating memories, clocks, third party IP)
• Configuring HAPS hardware (e.g., mapping standard interfaces and connectivity) for your verification strategy
• Optimizing your prototyping flow setup for RTL debug

In addition to project-based FPGA-Based Prototyping services, Synopsys consultants also provide dedicated Jumpstart training for customers who are new to the HAPS system.

Figure 1: Synopsys’ FPGA-based prototyping services include assistance with implementing an entire prototyping
methodology – from RTL development, through getting the design into HAPS hardware, to actual silicon.

A typical jumpstart includes five days of on-site services to assist you in setting up a comprehensive FPGAbased prototyping flow customized for your design environment. The collaborative, hands-on deployment model accelerates the integration of prototyping into your overall verification plan while advancing your design team's knowledge of FPGA-based prototyping methodologies and implementation. Synopsys will adapt the jumpstart to your team's experience level with FPGA-based prototyping. Jumpstart engagements may include:

• Hands-on training that covers key tool features and methodologies using a sample design
• A review of your verification plan and prototyping goals to assist you in creating a prototyping project plan that specifies the appropriate setup and configuration required. Portions of your actual RTL code can be used to setup and illustrate the key aspects of the prototyping flow
• Using the HAPS hardware available at your site, your engineers will get hands-on experience configuring the hardware

To get more information on how we can customize our services to help you meet your design goals, please contact us or call your local Synopsys sales representative.