Core Optimization 

Optimize the performance, power and area of your processor core 

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Achieving the best performance, power and area (PPA) for processor cores is both a science and an art. A variety of interacting factors affect the achievable performance, power and area of a processor implemented in an SoC. The number of processor cores, the size and organization of cache memories, the underlying silicon process and the range of operating conditions are some of the more common parameters that effect a core's performance, power and area. The standard cells and embedded memories used to implement the core also have a significant impact on the PPA results that can be achieved and the time it takes to attain them. Other factors, such as test and debug features, power control circuits, clock noise and on-chip variation also play important roles. Of course, getting from “baseline” results to "expert" results in the fastest possible timeframe often means the difference between product success and failure.

Synopsys Professional Services has extensive experience helping designers optimize their CPU and GPU cores for performance, power and area. Leveraging leading-edge tools from the Galaxy™ Implementation Platform, optimized core hardening scripts, extensive experience with processor-optimized logic libraries and memories such as the DesignWare HPC Design Kit, and the Lynx Design System, Synopsys core optimization specialists are uniquely qualified to help customers realize their specific processor PPA goals in the shortest amount of time. As part of a broader portfolio of core hardening services, Synopsys' FastOpt services can help design teams achieve a CPU or GPU core implementation in as little as four to six weeks.

Synopsys' specialized Core Optimization Services include:
  • Determining design feasibility and performance estimates
  • Core configuration and cache partitioning
  • Creating an optimal floorplan, including alignment of cache memories
  • Addressing test, clock and physical effects early in the synthesis phase
  • Managing dynamic and leakage power
  • Choosing the best clocking scheme to minimize power and skew
  • Timing-optimized placement and critical path optimization
  • Deploying core hardening flows/scripts, methodologies and best practices
  • Knowledge transfer from consultants with extensive experience implementing CPU and GPU cores from leading processor IP companies such as ARM and Imagination Technologies
  • FastOpt, EnhanceOpt and MaxOpt service packages

To get more information on how we can customize our EDA consulting services to meet your project or design goals, please contact Synopsys Professional Services or call your local Synopsys sales representative.

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