Articles 

As virtual prototypes are becoming part of the automotive Tier 1 and OEM development flows, Marc Serughetti, Synopsys, explains how the availability of virtual microcontroller models is becoming essential, and how Synopsys is working with automotive semiconductor companies to provide them.
May 15, 2013

While 4G LTE has moved into the mainstream, there are lessons to be learned about these very complex modems, especially from the perspective of balancing power and performance.
May 09, 2013

In the automotive industry, millions of lines of code must be written, tested and thoroughly debugged to ensure that new vehicles meet performance requirements and buyer expectations. Due to tight production schedules, complex software must be developed before the actual hardware becomes available. Synopsys, a Renesas technology partner and a global leader in EDA tools and semiconductor IP, helps system engineers overcome this challenge.
Apr 29, 2013

The challenges now facing semiconductor companies are huge, and they don't stop with complexity. In tiny geometries, with as many as tens of millions of gates, today's SOCs are likely to be multicore and to have on them up to 100 IP blocks. The clincher, though, is that despite all that complexity, silicon has become almost a commodity with software having become the differentiator.
Mar 11, 2013

While the geometries of advanced node processes such as 28nm and below may not greatly impact SoC architectures, the complexity enabled by the leading edge brings intense challenges all the same.
Jan 31, 2013

This article will introduce how Virtualizer Development Kits (VDKs) enable software prototyping and bring up for DesignWare IP. The article will illustrate the innovative board level VDK construction concept which overcomes the typical hurdle of creating a virtual prototype and introduces how VDKs sit in the comfort zone of embedded software developers by leveraging a wide embedded software ecosystem for ARM’s Versatile Express reference board and enables standard 3rd party debug tools. The specific VDK software enablement capabilities for Synopsys' DesignWare IP will be explained by means of interface peripherals such as MMC, GMAC, USB and I2C.
Jan 29, 2013

We will see an increase in embedded vision technology, making machines see and understand their environment. Computer vision algorithms have been a long standing research topic and now they make their way into embedded devices thanks to increased embedded processor performance.
Jan 03, 2013

The automotive industry faces a significant challenge: to release cars with zero software defects. The number of recalls and redesigns due to software problems illustrates the magnitude of the challenge – they have grown exponentially over the last decade. There are major economic implications for manufacturers since the cost of recalling a vehicle can be huge, especially when the issue affects the integrity of the brand. - Victor Reyes, Synopsys
Dec 17, 2012

Virtual prototypes allow designers to save development time as well as cut costs. Synopsys Virtualizer' creates VPs from its EDA model libraries and block-creation flows. VPs are then submitted to Synopsys' hardware/software analysis tools to verify SoC performance.
Dec 03, 2012

In the second of a three-part series of articles on virtual prototyping, Achim Nohl explains how to use the Synopsys Virtualizer Development Kit (VDK) and describes the hardware/software integration flow for a sensor subsystem for use in an Android mobile device.
Nov 07, 2012

In the first in a three part Product How-To series on virtual prototyping, Achim Nohl describes how to use the Synopsys Virtualizer Development Kit (VDK) to do early prototyping. He also explains how to do full software integration of handset hardware in the context of the Android software platform.
Oct 27, 2012

Dec 18, 2011, marked the 25th anniversary of EDA provider Synopsys Inc, which has been both witness to and participant in the evolution of signal processing.
Aug 27, 2012

Today's SoCs contain as much as 80% existing IP that either has been re-used from previous projects or obtained from a third party. Models are created of this hardware IP, as well as new portions of the design, in order to create a virtual prototype that allows the engineering team to see the complete system by running software and applications.
Aug 23, 2012

Learn how one can use system-level design methods at the earliest stages of SoC design to determine the optimal interconnect configuration that meets a set of performance goals and system constraints. With a system-level environment like Synopsys Platform Architect and configurable SoC interconnect IP like Arteris FlexNoC, it is possible to quickly create and run multiple simulations that explore and optimize possible configurations.
Aug 20, 2012

Virtual prototypes provide complete frameworks to create advanced fault-injection scenarios, which are non-intrusive, run faster and offer more control and visibility than traditional methods. Victor Reyes, Synopsys, explains their relevance to new safety-critical standards like ISO 26262.
Aug 01, 2012

Models and modeling concepts seem to be on the tip of every tongue these days. Once the promise of sparking true ESL design, the use of system-level models has settled into something more like enabling software development. There is also talk of leveraging models across the supply chain, but is this really possible yet? The concept of doing this incremental refinement and re-using models across multiple use cases is starting to gain a lot of interest.
Jun 28, 2012

A new modeling methodology is proposed to improve performance validation at an early stage in the design cycle of systems dedicated to handheld devices. Hardware models are typically available early in the chipset development cycle, but software, such as multimedia applications, may not be developed until after the ASIC is designed. An alternative source of simulation stimulus must be found so that hardware models can be exercised in the absence of such software. This paper describes three approaches that overcome this dependency and enable the validation of application processor performance at the architecture stage of silicon design: high-level software models, trace-driven characterization, and statistical traffic models. Correlation between actual measurements and simulation outputs demonstrates that these methods provide adequate accuracy for performance validation.
May 22, 2012

The case for developing and using virtual platforms (VPs) has now been made. If developers of complex HW/SW systems are not using VPs for their current design, complexity of next generation designs demands for their adoption. This paper summarizes a special session focused on the latest applications and latest use cases for VPs. It gives an overview of where this technology is going and the impact on complex system design and verification.
May 22, 2012

Synopsys has been delivering tools to create virtual prototypes for years. The new Virtualizer Development Kit (VDK) is designed to make that process easier. One feature is power debugging, which allows designers to see how power utilization performs for various run modes as well as for application execution. This then allows software developers to experiment with different run/idle management strategies as well as testing applications to see how well they perform.
Apr 14, 2012

Can we achieve the performance levels of the IMT-Advanced global standard for international mobile telecommunications?
Jan 30, 2012

This is the first of a series of articles that will attempt to bring answers together and to provide a comprehensive view of the prototyping space on how EDA vendors categorize prototyping, who creates the models, what are they used for, roadblocks in adoption and their opinions about the future of prototyping. If you are considering inserting a prototype into your design flow, which ones are likely to provide you with the most value and what are the difficulties you can expect to face?
Nov 21, 2011

IEEE announced that the IEEE Standards Association (IEEE-SA) Standards Board has approved a revised version of the IEEE 1666™ "Standard SystemC Language Reference Manual," which specifies SystemC, the high-level design language used in the design and development of electronic systems. The new version of IEEE 1666 encompasses many enhancements, notably the support for transaction-level modeling (TLM), a critical approach to enable higher level and more efficient design of complex integrated circuits (ICs) and system-on-chips (SoCs).
Nov 10, 2011

Synopsys' Multicore Optimization Technology is EDN's hot product of 2011. This technology is meant for performance analysis and early definition of multicore system architectures in SystemC. With Multicore Optimization Technology, users of of Platform Architect can capture HW/SW performance models of multicore system architectures in the early concept phase for robust performance measurement and trade-off analysis, months prior to software availability.
Nov 08, 2011

Part 3 of a roundtable discussion on hardware/software priorities with Neil Hand, group director for marketing for Cadence’s SoC realization; Johannes Stahl, director of product marketing for system-level solutions at Synopsys; Prasad Subramaniam, vice president of design technology at eSilicon; and Bernard Murphy, CTO at Atrenta.
Oct 14, 2011