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| Apr 25, 2013 | Synopsys Unveils Embedded Vision Development System
Reduces Development Time for Power- and Performance Optimized Application-Specific Processors from Months to Weeks
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| | Jan 25, 2012 | Yamaha Standardizes on Synopsys' Processor Designer after Cutting DSP Development Time in Half
Processor Designer Doubles Functionality for XMP-1 Sound Generator Device while Reducing Development Cost
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| | Jul 20, 2011 | Ricoh Adopts Synopsys - Processor Designer to Accelerate Custom DSP Design
DSP Development Time Cut in Half While Meeting Performance Goals
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| | Mar 07, 2011 | Yokogawa Achieves 5X Faster Programmable Logic Controller Performance with Synopsys' Processor Designer
Using Processor Designer, Yokogawa saved significant development and verification time by automatically generating software development tools. As part of Synopsys??? System-Level Design portfolio, Processor Designer automates the design of custom processors giving IP block designers an easy-to-use, high performance alternative to creating fixed processing hardware or application-specific processors in-house.
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| | Feb 07, 2011 | Synopsys Announces New Technology for Optimizing Multicore Systems
Synopsys announced the broad availability of Platform Architect with Multicore Optimization Technology, a new solution for performance analysis and early definition of multicore system architectures in SystemC. Using Platform Architect with Multicore Optimization Technology, designers of SoCs, chipsets and systems can capture hardware/software performance models of multicore system architectures in the early concept phase for robust performance measurement and trade-off analysis, months prior to software availability.
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| | Mar 23, 2010 | Synopsys completes the Acquisition of CoWare
Synopsys has completed the acquisition of CoWare, Inc., a global supplier of software and services for electronic systems design. The acquisition will expand Synopsys' portfolio of system-level design and verification products used in wireless, consumer and automotive design.
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| | Jan 12, 2010 | Synopsys Introduces Industry’s First SystemC TLM-2.0 SuperSpeed USB 3.0 Models
Synopsys announced the availability of SuperSpeed USB 3.0 transaction-level models (TLM) supporting the Open SystemC™ Initiative (OSCI) TLM-2.0 API specification. The models are TLM representations of the Synopsys DesignWare® SuperSpeed USB 3.0 Device and xHCI Host Controller IP.
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| | Jul 27, 2009 | Leading EDA Companies Join New ARM Fast Models Enablement Program
ARM today announced at DAC, San Francisco, Calif., that CoWare, Mentor Graphics and Synopsys Inc. have joined the ARM® Fast Models Enablement Program.
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| | Jun 08, 2009 | Synopsys Enables System Design Interoperability with System-Level Catalyst Program
Synopsys today announced its System-Level Catalyst Program to accelerate the adoption of system-level design and verification.
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