- Production-proven design flow incorporates the latest methodologies to deliver fast and predictable results
- Patented visualization technology provides intuitive, easy-to-use flow creation, management and project reporting
- Automated foundry/library data configuration and validation accelerates project setup and tapeout
- Open environment architected for library and foundry independence, as well as 3rd-party tool support, enables flow portability and customization across multiple projects
The Lynx Design System is a full-chip design environment that includes a production-proven design flow with innovative visualization capabilities to help designers implement and monitor designs all the way from RTL to GDSII. Developed by chip designers for chip designers, the Lynx Design System is based on tools from the industry-leading Galaxy Implementation Platform, and has been validated with more than 50 tapeouts from 180-nanometer (nm) to 28-nm.
The Lynx Design System encapsulates the collective experience of Synopsys and its foundry and third-party IP partners through established flows and recommended tool settings, enabling rapid set-up and ease-of-use for design teams of all sizes. The Lynx Design System automates the configuration of pre-validated foundry data to accelerate project start and embeds technology-specific checks to streamline tapeout to the foundry. The Lynx Design System is an open environment that readily accommodates customers’ internal or third-party vendor tools.
Figure 1: The Lynx Design System is comprised of an RTL-to-GDSII production flow with the latest design methodologies built-in, technology plugin-in’s to accelerate project start and completion, and unique graphical interfaces that greatly enhance ease of use.
Figure 2: Lynx Design System’s complete RTL-2-GDSII production flow.
The Lynx Design System’s patented visualization technology for design creation, data capture and project metrics reporting creates an environment that enhances the efficiency of designers and program managers alike.
Leading-Edge, Production-Proven RTL-to-GDSII Design Flow
The hierarchical production-ready flow (Figure 2) at the heart of the Lynx Design System is a complete RTL-to-GDSII implementation ﬂow which includes:
- Synopsys Galaxy Implementation Platform reference methodologies
- Built-in methodologies for design optimization, including optimizations for low power, area, performance and manufacturability
- Full-chip hierarchical RTL-to-GDSII support
- Validation with multiple standard cell libraries and foundry technology nodes
- Over 70 design metrics automatically captured, such as timing, area, power, runtime, license usage etc.
- Design environment support for job distribution, job submission optimization, revision control and data management
- Project-based deployment model enabling multi-site and multi-user support
- Full technical support and regular updates to the latest tools and methodologies
The Lynx Design System allows designers to configure and customize tool capabilities and methodologies based on their project needs and integrate third-party tools if necessary. For example, designers can configure Synopsys tools such as DC Ultra™, Design Compiler® Graphical for synthesis, TetraMAX® ATPG for design-for-test, PrimeTime for static timing analysis & timing sign-off and IC Compiler for physical design.
In addition to facilitating tool configuration, the production flow’s modular architecture enables users to easily configure horizontal methodologies that span multiple tools such as UPF-compliant MCMM for low power optimization and analysis, full-chip hierarchical design, etc. The Lynx Design System includes built-in support for concurrent modeling analysis and sign-off throughout the flow including static timing analysis (STA), formal verification, automatic test pattern generation (ATPG) and reliability analysis such as EM and IR drop for power and signal nets.
Built into Lynx are the best design practices for optimization and hardening of processor cores. This capability will help design teams shorten their time to optimized results in their core’s performance, power and area for their chosen process technology.
GUI-based Design Creation
The Lynx Design System includes a patented GUI that simplifies and automates flow creation, configuration and maintenance to improve the productivity of the design team. Intuitive and easy to use, Lynx’s Runtime Manager provides the ability to graphically edit, execute and monitor the Lynx design flow as a design progresses from RTL to tapeout.
Creating a new design flow or modifying existing flows is accomplished using intuitive edit operations. Flat or hierarchical design flows, for a single block or for an entire chip, are defined by connecting various tasks together based on their execution dependencies (Figure 3).
Parallel task execution, design exploration involving multiple runs of the same task, or experimenting with different parameters in the design flow are also easily accomplished within Lynx’s Runtime Manager. For example, exploring three different Design Compiler synthesis strategies is as simple as these four steps (figure 4) as follows:
- Right click the task to replicate
- Fill in the form with the necessary data
- “dc_compile” task has been replicated twice for a total of three “dc_compile” tasks
- Make the necessary changes to the compile strategy for the two new tasks
Once defined, the flows can then be executed and their status monitored. Visual reporting of results is immediate. Design tasks can be distributed across a compute farm using industry-standard job distribution tools, speeding the design process. By monitoring usage patterns of submitted jobs Lynx Design Systems can also automatically determine a more optimal value to be used for reserving compute resources. For more information on this feature go to the ARO tab, or review this datasheet.
On-Demand Design Status and Trend Reporting
The Lynx Design System provides designers and managers with ‘on-demand’ access to over 60 pre-defined flow metrics. Flow metrics can be design related or process related and they are easily extended to include new user-defined metrics.
Figure 3: The Lynx Runtime Manager’s graphical representation of the synthesis step in an RTL-2-GDSII design flow. This GUI enables easy creation, configuration and debug of design flows at multiple levels.
Figure 4: The Lynx Design System’s Runtime Manager aids in design exploration.
Users can create status and trend reports such as quality-of-results (QoR) and resource-related project metrics, like those shown in the figures 5 and 6 below.
Metrics are automatically captured during flow execution and stored in a database for customized reporting capability.
Through the patented Management Cockpit interface, designers and managers have real-time access to all captured project metrics and specified design targets to easily create custom reports, such as:
- Dashboards that show key project metrics such as frequency, area and power
- Trend analyses of design progress and comparison to target goals
- Current design status summary
- Block level comparisons of quality-of-results (QoR) data
- Summary of tools and tool versions used in the flow
- Summary report that compares results of design exploration steps
Adaptive Resource Optimizer
Adaptive Resource Optimizer (ARO) is a compute farm optimization feature in Synopsys’ Lynx Design System. ARO monitors usage patterns of submitted jobs and determines a more optimal value to be used for reserving compute resources (e.g., memory, CPUs) of future job submissions based on historical use data.
Figure 5: Bar-chart reports provide visual display of time spent at each design step, facilitating analysis of design bottlenecks.
ARO (figure 7) can substantially reduce job pending time, the time a job sits in queue waiting for a resource, and improve compute farm utilization by ensuring that jobs are assigned to the best queue/machine combination. The busier the compute farm, the greater the benefit realized from ARO compared to traditional fixed resource management practices. Improvements of 10% or more in each job’s turnaround time, the time it takes from job submission to getting results, can be achieved using ARO. When aggregated across 1000’s of jobs, ARO significantly improves the productivity of the design team.
ARO currently supports LSF, SGE and UGE but can be adapted for proprietary environments as well.
Figure 6: A “dashboard” status report provides an instant snapshot of the most important design metrics, comparing actuals to targets at various steps in the design flow.
Figure 7: Lynx Adaptive Resource Optimizer monitors usage patterns of submitted jobs and determines a more optimal value to be used for reserving compute resources
Technology Plug-ins Accelerate Time to Best Results
Lynx Technology Plug-Ins are pre-validated scripts and utilities that help accelerate project start and reduce the time it takes to get to optimized design results.
Mismatched, incorrect, or incomplete technology and library files can negatively impact a design project’s schedule and a designer’s productivity. The risk is especially high at newer process nodes where technology data is constantly changing. The library quality assurance plug-in includes scripts and documentation to configure and pre-test any library and technology files for proper execution in the design flow. These comprehensive data and integration checks help ensure that the incoming library and hard IP are configured correctly in the context of the design.
Lynx’s process node configuration plug-in gives designers a template configuration of tool and flow settings to quickly configure the Lynx flow for their choice of standard cell libraries and memories. To further expedite project setup, pre-validated configurations for commonly-used libraries and process nodes are optionally available. They include process technology information and representative flow and tool settings for specific libraries and foundry nodes spanning from 180-nm down to 20-nm, including a Lynx plug-in for the DesignWare® HPC (High Performance Core) Design Kit for TSMC 28HPM.
Processor cores are often the most critical IP block in an SoC, and optimizing the implementation for the best balance of performance, power and area can require a significant amount of effort. To provide design teams with a more productive starting point, Lynx’s optimized IP design flow plug-ins include pre-tuned and IP-specific flow scripts, optimized timing and DFT constraints, floorplans and placement guidance, IP-specific tool settings, and design and floorplan exploration and comparative analysis flows for leading processor cores, including
Open Architecture for Easy Integration into Your Chip Design Environment
The Lynx Design System’s modular architecture enables it to be customized to of the end-user’s chip design environment. For example, steps in the production flow are partitioned at key logical hand-off points (synthesis, design planning, place and route, etc.), making it easy for users to plug-in custom “sub-flows” as needed.
While the Lynx Production Flow is tuned to deliver superior quality of results with the Synopsys Galaxy Implementation Platform, it can readily incorporate internal or other vendors’ tools into the design flow by updating standard and well understood TCL scripts. Other common Lynx flow customizations include:
- Integration of customer specific methodologies , specialized flows and handoff points
- Adding custom metrics for performance, power, area or milestone tracking
- Supplemental DFM process checks
The Lynx Design System is a highly integrated, production-ready SoC development platform that delivers a streamlined path to tape-out. Based on proven flows, it eases new technology adoption and enables designers to work smarter and faster on their primary task of delivering differentiated designs on spec and on schedule.
For more information, visit www.synopsys.com/lynx.