| Mar 25, 2013 | Synopsys Introduces Galaxy Custom Router
New Shape-Based Router Brings Automatic Custom Net Routing to IC Compiler Users
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| Mar 19, 2013 | Micronas Standardizes on Synopsys’ Design and Verification Solutions for Automotive Designs
Solutions Include Galaxy Custom and Digital Implementation, Discovery Verification Platform
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| Jan 22, 2013 | Synopsys Accelerates Adoption of FinFET Technology with Production-Proven Design Tools and IP
FinFET Technology Support Developed over Five-year Collaboration with Industry Leaders
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| Jan 22, 2013 | Synopsys Contributes PyCell Technology to the IPL Alliance
Contribution underscores Synopsys' commitment to an open custom design ecosystem
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| Dec 20, 2012 | Samsung and Synopsys Collaborate to Achieve First 14-nanometer FinFET Tapeout
Collaboration Encompasses Synopsys IP, Design Implementation, Extraction and Signoff Tools
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| Oct 15, 2012 | Synopsys and TSMC Collaborate for 20nm Reference Flow
Design Tools in Synopsys® Galaxy™ Implementation Platform selected in 20nm Reference Flow for Physical Implementation, RC Extraction, Timing Analysis and Physical Verification
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| Oct 11, 2012 | Synopsys and TSMC Deliver 3D-IC Design Support
Design Tools Selected in TSMC's First Integrated, Validated Reference Flow and Design Kit Enabling Multi-Die Integration Using TSMC CoWoS Technology
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| Aug 03, 2012 | Synopsys to Acquire SpringSoft
Acquisition Will Complement Synopsys' Technology Portfolio and Help Accelerate Delivery of SoC Debug and Custom Implementation Tools to Customers
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| Jul 30, 2012 | Synopsys Acquires Ciranova
Acquisition Strengthens Synopsys Custom Design Solution and Underscores its Commitment to Enabling Interoperable Process Design Kit Ecosystem
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| Jul 24, 2012 | Synopsys Mixed-Signal IC Design Solution Qualified for TowerJazz Power Management Reference Flow 2.0
Collaboration Delivers Comprehensive Power Management Solution
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| Jun 04, 2012 | Synopsys and Samsung Deliver a Complete Solution for 20-Nanometer Node
Solution Includes Place and Route, Physical Verification, and Signoff Design Tools
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| Feb 28, 2012 | BiTMICRO Selects Synopsys for Chip Design Automation
Two third-generation SSD controllers taped out using Synopsys' Galaxy Implementation and Discovery Verification Platforms
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| Feb 22, 2012 | Synopsys Completes Acquisition of Magma Design Automation
Will enable the company to more rapidly meet the needs of leading-edge semiconductor designers
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| Feb 09, 2012 | CSR Selects Synopsys for Advanced-Node SoC Design
Adoption of Synopsys Galaxy Platform Driven by Superior Results for ARM CPU-based SoCs
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| Jan 25, 2012 | Synopsys Collaborates with Sigrity to Accelerate Signal Integrity Analysis
Combination of HSPICE and Sigrity Solution Delivers Up to 3X Speed-up for SI Analysis
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| Oct 25, 2011 | eSilicon Selects Synopsys' Custom IC Design Solution and Tapes Out 28-nm Designs
Comprehensive Solution Enables Rapid Ramp-up and Delivery of Advanced Custom IP
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| Sep 26, 2011 | Synopsys Delivers Unified Solution for Digital and Custom SoC Designs
STMicroelectronics Reports 2X Productivity Advantage Over Existing ECO Flow with the Integration of IC Compiler and Galaxy Custom Designer
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| Jul 11, 2011 | Synopsys Announces Milestone in 20-nm Collaboration with Samsung Electronics
Samsung successfully tapes out first 20-nm test chip using IC Compiler and In-Design Physical Verification with IC Validator
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| Jul 11, 2011 | Synopsys and GLOBALFOUNDRIES Collaborate to Deliver 65nm iPDKs
Synopsys and GLOBALFOUNDRIES Collaborate to Deliver Interoperable Process Design Kits (iPDKs)
Synopsys Custom Design Solution Now Supported by GLOBALFOUNDRIES 65nm Process Technologies
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| Jun 13, 2011 | Synopsys Custom Design Solution Enables Moortec Semiconductor to Tape Out High-performance Analog IP
Unified Solution Streamlines Development of Embedded Temperature Sensor IP for 65nm, 40nm and 28nm Geometries
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| Jun 02, 2011 | Synopsys and TSMC Collaborate to Deliver Custom Design Solution for 28nm Analog/Mixed-Signal Reference Flow 2.0
Synopsys Galaxy Custom Designer Provides New Capabilities to Address Advanced Process Node Design Challenges
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| Jun 02, 2011 | Synopsys Collaborates with STMicroelectronics to Help Achieve Critical Milestone in 20-nm Design
ST Successfully Tapes Out First 20-nm Test Chip
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| May 26, 2011 | Synopsys Delivers 28-nm Design Solutions and Advanced System-Level Capabilities for TSMC Reference Flow 12.0
Flow provides optimized methodologies to shorten time-to-market and time-to-volume for designers using TSMC's 28-nanometer process technology
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| Apr 26, 2011 | Latest Innovations in Synopsys IC Compiler Deliver up to 40 Percent Power Reduction at HiSilicon
IC Compiler Widely Deployed In HiSilicon Production Design Flow
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