Customer Success: Fujitsu Wireless
Fujitsu Chooses SPW to Meet Aggressive Schedule For Its Latest LTE-Compatible RF Transceiver Design
Fujitsu's latest MB86L11A 2G/3G/4G multimode, multiband transceiver chip supports benchmark performance for current drain and RF parameters. In order to support the LTE standard while meeting schedule and cost pressures, Fujitsu's transceiver systems team had to design algorithms with a higher simulation complexity per test case and a larger number of test cases overall. The team estimated that these requirements increased the design complexity by at least 5X. So, Fujitsu is using SPW for algorithm design and analysis as well as automatic HDL generation. Quoting Fujitsu," The accurate prediction of system performance through the fast simulation and first-time right RTL generation technology offered by SPW are essential competitive advantages in our fast-moving wireless market."
Read the complete Fujitsu Success Story.
LTE/ LTE-A Model Library Extended
Beginning with the June 2011 release, customers of the LTE library gained access to the LTE-A(dvanced) enhancements that have been added to the library. No additional license key is required, as all LTE-A capabilities come as a maintenance update to all LTE library licensees. Since then, there have been ongoing extensions of the LTE/LTE-A library, including end-to-end simulation systems for both uplink and downlink. End-to-end simulation systems include ideal receivers, and also complete MIMO Receiver models for general M x N MIMO configurations, featuring different algorithms, including Zero-Forcing (ZF), Minimum Mean-Squared Error (MMSE) Maximum Ratio Combining (MRC) and Maximum Likelihood (ML). The June 2012 release comes with updates to the LTE Downlink Practical Receiver System. The latest release features the channel model of the LTE-A system and aligns the PHICH transmission and reception for the 4 antenna use case, addressing the need for a unique transmit diversity along with the associated changes in the MIMO receiver.
For detailed information on the LTE-A features included in the LTE library product, read the datasheet.
What's New in SPW and System Studio?
In June 2012, both SPW and System Studio have new releases available.
- SPW 2011.06-SP2 (June 2012), release notes available for download from SolvNet:
- HDS enhancements, to ease migration from SPW 4.x to 2011.06-SP2. This includes better naming control in the generated RTL, support for parameter-based HDS clock connections and improved handling of global clock connections in RTL generation and RTL co-simulation.
- Migrator enhancements, to ease the migration from SPW 4.x to 2011.06-SP2. Features include support for parameter based clock connections, improved handling of clocked probes, and improved visibility of clocks in the migrated design. Also HFSM now allows for a much easier migration to the new table driven format.
- Design Editor enhancements, including faster drawing of complex HDS designs with many probes and faster move of instances and connectors in large designs.
- 64 Bit Simulation runs (BETA): additional option to compile and run simulations in 64-bit, for Linux
- LSF integration (BETA): support for Platform Computing's LSF for distributing the remote simulation runs on a Linux server farm
- System Studio 2012.03 (March 2012) and 2012.03-SP1 (June 2012) release notes available for download from SolvNet:
- Namespace supported in PRIM models, enabling a seamless reuse of C++ functions, types, classes and objects that are declared in namespaces in external header files.
- C/C++ parser update, to follow recent advances of C/C++. This is relevant for C/C++ symbols used in PRIM models, and SystemC model information from SystemC files
- Merging System Studio models (BETA): enables to work on models in parallel, 3-way merges are now supported. System Studio automatically detects whether changes from different sources are conflicting or not. Related to this, non-blocking check-out of models is now enabled.
Events & Webinars
Exhibition: Wireless Technology Park 2012: July 5/6 (Pacifico Yokohama)
Synopsys will present its entire range of system-level solutions, including demonstrations of our LTE / LTE-A algorithm design capabilities.
New Webinar recording: LTE-A Physical Layer Design and Simulation
In this webinar, we give an introduction to the LTE-A standard (Rel.10) and explain the main enhancements over LTE Rel.8 and their implication on the overall system complexity. Synopsys' LTE-A baseband reference library, a standard-compliant physical layer reference library verified in collaboration with Rohde & Schwarz, is used to demonstrate the new features of LTE-A, its complexity and operation.
- Recorded webinars
- LTE-A Physical Layer Design: Downlink
Overview on the downlink specific enhancements of Rel 10 over Rel.8
- Closing the Verification Gap: Integrating Algorithm and RTL Verification for Signal-Processing Applications
Learn how to take advantage of behavioral models for RTL verification to create an integrated signal-processing verification flow from algorithm concept to RTL.
- LTE Physical Layer Design: Basics
Overview of the LTE Standard, LTE simulation library and Synopsys SPW algorithm design tool
- LTE Physical Layer Design: Optimization
LTE physical layer design and how design choices can impact implementation and performance
- LTE Physical Layer Design: Synchronization
Learn more about some of the features of the LTE User Equipment (UE) acquisition and synchronization process.
Interested in regular updates on Algorithm Design news and products? Sign up for our bi-annual newsletter!