Overview / Who should Attend
Are you an engineering manager at a semiconductor or systems company developing complex ASIC/ASSP/SOC? Are you faced with the challenge of addressing the growing impact of embedded software on chip development schedules and budgets? If you answered “yes” to both of these questions, then you would benefit from attending this key Synopsys Rapid Prototyping Seminar.
Synopsys is hosting a free, half-day educational seminar to explore the economic and technical issues facing ASIC hardware and software development managers, plus the available solutions from Synopsys. Experts from Synopsys will review how new, rapid prototyping systems can help reduce costs while speeding completion of system validation and software development, as well as examine the future direction of rapid prototyping. The seminar will conclude with a keynote presentation from a local chip development manager on a recent project. A social mixer will follow the seminar for informal Q&A.
- What You Will Learn
- Economic and Technical Challenges of ASIC HW/SW Verification;
Synopsys Software-to-Silicon Verification Overview
- Confirma Rapid Prototyping Solution Introduction
- Synopsys Technology Outlook: Evolving System/Software Validation Challenges and Solutions
- Customer Keynote: Case study of prototyping in ASIC and SW development process
- Social Mixer: Meet with Synopsys business and technical representatives as well as local peers for networking and informal Q&A
| Date|| Location|| Registration|
|July 10, 2009||Bangalore, India||Coming soon|
|September 2009||Hyderabad, India||Coming soon|
|September 2009||Noida, India||Coming soon|
Please bookmark this site and check back often as it will be updated as seminar details and registration information become available.