Feb 24, 2014Synopsys Launches DesignWare ARC Software Development Platforms to Accelerate Software Development of ARC Processor-based SoC Designs
Pre-Verified Hardware and Software Platforms Integrate ARC Processors, Peripherals, Operating Systems and Software Development Tools to Enable Immediate Productivity

Feb 12, 2014Synopsys, Realtek and UMC Collaborate on Industry's First Single-Chip Ultra High Definition Smart TV SoC
Realtek's Chip Achieves First-Pass Silicon Success Using Broad Portfolio of DesignWare Logic Libraries and Embedded Memories in UMC's 40-nm Process

Feb 11, 2014Synopsys and Alango Technologies Deliver Voice Communication Package for DesignWare ARC Audio Processors
Integrated Audio Processing Solution Includes Proven Voice Enhancement Technologies that Speed Time-to-Market for Developers of Mobile and Stationary Communication SoCs

Jan 28, 2014Synopsys Announces Immediate Availability of Multiprotocol DesignWare Enterprise 12G PHY IP
High-Performance PHY IP Supports 1.25 Gbps to 12.5 Gbps Throughput and Cuts Power Consumption by up to 20 Percent for High-End Networking and Computing Applications

Dec 16, 2013Synopsys Extends HAPS-70 Prototyping Family with New Solution Optimized for IP and Subsystems
HAPS Developer eXpress Solution with Pre-Integrated Hardware and Software Enables Fast Prototyping of Complex IP Systems

Dec 10, 2013Synopsys Demonstrates Industry's First SuperSpeed USB 10 Gbps Platform-to-Platform Host-Device IP Data Transfer
Ellisys Protocol Analyzer Confirms Performance of 10 Gbps USB 3.1 Effective Data Rates, More Than Doubling SuperSpeed USB Throughput for Consumer Applications

Dec 09, 2013Abilis Systems Achieves First-Pass Silicon Success with DesignWare ARC Processors, Interface IP and Synopsys Professional Services
Silicon-Proven DesignWare IP, Lynx Design System and Consulting Services Reduce Integration Risk and Reduce Time-to-Market by Three Months

Nov 20, 2013Synopsys New Ultra Low-Power Non-Volatile Memory IP Cuts Power by 90 Percent and Size in Half
DesignWare Multiple-Time Programmable NVM IP Reduces System Costs for Wireless and RFID / NFC Tag Applications

Nov 12, 2013Synopsys and CEVA Deliver Superior Performance, Power and Area for CEVA DSP Cores with DesignWare HPC Design Kit
HPC Design Kit of Optimized Embedded Memories and Logic Libraries Yields 8 Percent Performance Improvement and 13 Percent Leakage Power Reduction with Smaller Area for CEVA-XC DSPs

Nov 06, 2013Design & Reuse to Host TLMCentral Web Portal
Synopsys' Transfer of TLMCentral to Design & Reuse IP Portal Enables Easy Search of More Than 1000 IP Models to Speed SoC Software Development

Nov 06, 2013Synopsys Surpasses 3000th USB IP Design Win and 1000th PCI Express IP Design Win
Use of Silicon-Proven DesignWare IP by More than 600 Companies Demonstrates High Quality and Low Integration Risk

Nov 05, 2013Synopsys Announces DesignWare ARC HS Processors for Next-Generation Embedded Data and Signal Processing Systems
New Performance-Efficient Design Optimized for Maximum DMIPS/mm2 and DMIPS/milliwatt

Oct 28, 2013Synopsys Announces Availability of Discovery Verification IP for ARM AMBA 5 CHI Standard
Discovery VIP Successfully Leveraged by Early Licensees Now Broadly Available

Oct 22, 2013Synopsys Extends DesignWare IP Portfolio for Data Center SoCs with Enterprise 40G Ethernet Controller IP
DesignWare IP Optimized to Address Throughput and Quality-of-Service Requirements in Modern Data Center SoCs

Oct 15, 2013Synopsys Introduces DesignWare ARC EM SEP Processor for Safety-Compliant Automotive Systems
Integrated Safety Features and ASIL D Ready Compiler Ease Development of ISO 26262-Compliant SoC Designs

Oct 01, 2013Synopsys Selected as TSMC's 2013 "Interface IP Partner of the Year" for Fourth Consecutive Year
Award Recognizes Technical Leadership, Number of Customer Tape-Outs, and Outstanding Customer Support

Sep 19, 2013Synopsys Announces Immediate Availability of Broad Portfolio of Interface IP for TSMC's 20SoC Process
Silicon-proven Synopsys IP Portfolio on TSMC's 20SoC Process Technology Enables Designers to Reduce Power Consumption and Increase Performance for Mobile and Multimedia SoC Designs

Sep 11, 2013Synopsys Demonstrates Industry's First SuperSpeed USB Inter-chip (SSIC) Interoperability
Successful SSIC Interoperability Reduces Integration Risk and Speeds Time-to-Market for Mobile and Wireless Designs

Sep 09, 2013Synopsys Announces DesignWare STAR Hierarchical System to Accelerate Silicon Testing of SoCs
Significantly Reduces Test Integration Time and Improves Test QoR for Hierarchical SoCs

Sep 05, 2013Synopsys Launches DesignWare HDMI 2.0 TX/RX Controller and PHY IP for Ultra High-Definition Multimedia Experience
Full Support for New HDMI 2.0 Specification Provides Flickerless 4K x 2K Resolution for HDTVs

Aug 12, 2013Synopsys Introduces Dolby MS11 Decoder for DesignWare ARC Audio Processors
Support for Dolby Laboratories' Multistream Decoding Expands Portfolio of ARC Audio Codecs

Jul 30, 2013Synopsys Launches Ultra-Low Power IP Subsystem for Sensors
Configurable Hardware and Software IP Solution Enables Rapid Integration of Sensor Functionality into SoCs

Jul 17, 2013Synopsys Announces Availability of Complete 28-nm Data Converter IP Portfolio
Latest Generation Reduces Power Consumption by up to 76 Percent and Area Use by up to 86 Percent for Mobile Communication SoCs

Jun 25, 2013Synopsys and UMC Collaborate to Accelerate Development of UMC's 14-nm FinFET Process
Process Qualification Vehicle Tapeout Validates UMC 14-nm FinFET Process Using Synopsys DesignWare IP and StarRC Parasitic Extraction Tool

NewsArticlesBlogsWhite PapersWebinarsVideosNewslettersCustomer Successes