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DesignWare Technical Bulletin - USB 3.1, HDMI/MHL, LPDDR4, ARC Processors and more
What the LPDDR4 Multi-Channel Architecture Can Do for You
NEW! DesignWare IP Prototyping Kits for 10 Interface Protocols
KYOCERA Document Solutions Uses Synopsys’ ASIP Tool to Accelerate Design of Image Processing DSP
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Synopsys' New LPDDR4 Verification IP Accelerates Verification Closure for....
Synopsys Expands IP Accelerated Initiative with New DesignWare IP Prototyping....
Nitero Achieves First-Pass Silicon Success for Industry's First Mobile 60GHz....
KYOCERA Document Solutions Uses Synopsys’ Application-Specific Instruction-Set....
Synopsys Announces Availability of DesignWare Non-Volatile Memory IP for....
Synopsys' New DesignWare Sensor and Control IP Subsystem Delivers Ultra Low....
Synopsys' New USB 3.1 IP Solution Enables 10 Gbps Data Transfer Speeds for....
All Synopsys News
EE Journal: New Synopsys SoC Test Features
Insight: Energy Efficient IP Solutions for IoT Chip Design
Insight: Get Embedded Linux Applications to Market Fast with Synopsys’ ARC HS38 Processor
Insight: Innovate Fast - Get to Market First
Insight: Ultra Low Power Sensor and Control Processing for SoCs
EDACafe: USB 3.1: Synopsys still King of the Hill
Tech Design Forum: 10Gbit/s USB 3.1 IP and verification support on the way
Committed to Memory
USB IP Blog: To USB or Not to USB
The Eyes Have it: A Mixed-Signal IP Blog
On the Move: MIPI IP Blog
Real-Time Trace: A Better Way to Debug Embedded Applications
Designing Application-Specific Processors for Wireless Baseband SoCs
A Method to Quickly Assess the Analog Front-End Performance in Communication SoCs
ARC HS38: Single- and Multicore CPUs for High-Speed Linux Processing on an Embedded Budget
Meeting the USB IP Requirements of SoC Designs from 180-nm to 14/16-nm FinFET
How VXLAN-Based Ethernet IP Solves Cloud Computing Network Bottlenecks
Reliability, Availability and Serviceability (RAS) for Memory Interfaces
FinFETs For Your Next SoC: To Move or Not To Move?
LPDDR4 Multi-Channel Architecture
Simplify Sensor and Actuator Functionality for your IoT Solution
Embedded Linux Processing on an Embedded Power Budget
Optimize DSP core with Logic Libraries & Embeded Memories
NVM Design for High-Volume Automotive ICs (Mandarin)
Ethernet in the Connected World
Featured USB Video: Synopsys & DisplayLink: USB 3.0 Digital Office Products at IDF 2014
Featured PCIe Video: Synopsys PCI Express 4.0 IP & 16 Gbps PHY at IDF 2014
Featured IP Subsystems Video: 9D Sensor Fusion Demonstration Featuring DesignWare Sensor IP Subsystem
Faster SW development, IP prototyping & integration with DesignWare IP Prototyping Kits for USB 3.0
Physical IP Development on FinFET - There's Nothing Planar About It! (12:30-2:00)
Featured HDMI Video: Synopsys Demonstrates DesignWare HDMI 2.0 IP Solution
Featured MIPI Video: Synopsys Demonstrates DesignWare UFS Host and MIPI UniPro IP Interoperability
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Rockchip Achieves First-Pass Silicon Success for Mobile Application Processor SoC with DesignWare USB, HDMI & MIPI IP
Fast Integration of DesignWare IP for PCI Express Enables Nitero's First-Pass Silicon Success for Mobile 60GHz SoC
Movidius Achieves First-Pass Silicon Success for Myriad 2 Vision Processing Unit with DesignWare USB 3.0, LPDDR3/2 & MIPI D-PHY IP
Solarflare Achieves First-Pass Silicon Success for 10/40G Network Controllers with DesignWare IP for PCI Express 3.0
Bosch Achieves First-Pass Silicon Success for Consumer Sensor Application with Synopsys DesignWare NVM IP
SunplusIT Achieves First-Pass Silicon Success for Webcam SoC with DesignWare USB 3.0 PHY & Controller IP
KYOCERA Designs High Performance Image Processing DSP for Next Generation Multi-Function Printer Using Synopsys Processor Designer
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