|Marvell Reduces Networking SoC Die Size by 10% with DesignWare STAR Memory System Multi-Memory Bus Processor|
“Synopsys’ STAR Memory System and Multi-Memory Bus Processor is unique to the industry. No competitive solution can match its flexibility, high test coverage, and ability to minimize test area, power and cost.”
Marvell Semiconductor, Inc.
|Bosch Achieves First-Pass Silicon Success for Consumer Sensor Application with Synopsys DesignWare NVM IP|
"We found the DesignWare NVM IP to be very easy to integrate and adopt. Selecting Synopsys IP is one of our risk-reduction techniques. DesignWare NVM IP allows us to minimize work on the memory interface and accelerate integration into the IC."
Director of IC Engineering,
|Abilis Achieves First-Pass Silicon Success for Secure Media Processor Using Synopsys DesignWare IP and Lynx Design System|
“One of the most valuable contributions of Synopsys’ DesignWare IP is that it works the first time. We did not want to spend our valuable resources on developing IP, so using easy-to-integrate, proven IP from a trusted partner was critical to our success.”
Principal Design Engineer,
|OCZ Achieves First-Pass Silicon Success for SSD Controller Using DesignWare IP and Synopsys Professional Services|
"There are times when projects call for third-party physical design tools and IP blocks, and we found that the combination of Synopsys’ IP, tools, and consulting services allowed us to deliver this project faster than we could have done otherwise."
|Chipus Achieves First-Pass Silicon Success for UHF RFID Design with Synopsys DesignWare AEON MTP NVM IP|
"Our end customer's aggressive schedule left no room for error. Synopsys DesignWare IP enabled us to achieve first-pass silicon success for our UHF RFID design, just as we had expected with Synopsys' reputation as a provider of high-quality IP."
|PLX First to Market with PCI Express Gen 3 Switch using DesignWare Embedded Memory IP|
"After qualifying several vendors, we found Synopsys' silicon-proven DesignWare Embedded Memory portfolio offered the broadest range of compilers with an array of options to meet our varied design requirements. The combination of small area, high performance and advanced power management capabilities made selecting Synopsys an easy choice."
Senior Director of Physical Design,
|Analog Devices Achieves Silicon Success for Multiple ICs Using DesignWare Non-Volatile Memory IP|
"Synopsys high-quality DesignWare AEON NVM IP enabled us to incorporate the required functionality and tapeout multiple chips on schedule."
Dr. Craig Wilson,
|Wilocity Teams with Synopsys - Synopsys Professional Services Integrates DesignWare IP for 65nm Wireless PCI Express Design|
"As consumers demand greater mobility, device manufacturers are requiring advanced mobile computing platforms that enable them to deliver thin and light devices without sacrificing performance and functionality. Wilocity's use of proven DesignWare IP and close collaboration with Synopsys Professional Services has enabled us to successfully develop truly multi-gigabit wireless chips that are optimized for today's mobile devices."
Director of Physical Design,
|Verayo Achieves First-Pass Silicon Success for RFID Security IC with DesignWare AEON NVM IP |
"Synopsys was the only provider to offer a silicon-proven MTP NVM IP solution that met all of our performance, power and cost requirements and was easily ported to the targeted process technology."
Director of Engineering,
|DesignWare Memory Models Help Genesis Microchip’s Image Processor Reach the Market on Time|
"The DesignWare® Memory Models from Synopsys are the right choice for our design verification. With high quality, ease of use, model availability and excellent documentation, we maximize the likelihood of chip success."
Dr. T. Chan,
Senior Vice President of Engineering,