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Jul 15, 2014Emulex Accelerates Verification Closure with Synopsys Verification IP for Ethernet
Native SystemVerilog Ethernet 1G/10G/40G/100G VIP now includes UNH compliance source-code test suite

Jul 08, 2014Synopsys Cuts Area of DesignWare NVM IP for Automotive Grade 0 Applications by 75 Percent
New Trim NVM IP Leverages Faster Programming Times to Reduce NVM Test Time by 3X Without Compromising AEC-Q100 Quality

Jul 08, 2014Synopsys Expands Verification IP Portfolio with Compliance Test Suites
Protocol test suites in SystemVerilog source code accelerate compliance testing of Ethernet, USB, PCI Express, ARM AMBA AXI and MIPI CSI-2 protocols

Jun 24, 2014Synopsys Announces Immediate Availability of Broad Portfolio of IP for TSMC 28HPC Process
Production-Ready DesignWare IP for TSMC 28HPC Process Enables Designers to Reduce Power Consumption and Area for Mobile and Ultra Low-Power IoT Designs

Jun 03, 2014Synopsys Expands Verification IP Portfolio with Memory Models
DDR and LPDDR Verification IP Now Broadly Available

Jun 02, 2014Synopsys Redefines the IP Supplier Paradigm with New IP Accelerated Initiative
New DesignWare IP Development Kits and Customized Subsystems Accelerate Prototyping, Software Development and Integration of IP into SoCs

Jun 02, 2014Samsung and Synopsys Deliver Design Tools and IP for 14-nm FinFET Process
FinFET-ready Silicon-proven Tools and IP Available for Immediate Design of SoCs

May 29, 2014Synopsys Introduces DesignWare ARC Processors Optimized for Low-Power Embedded DSP Applications
New ARC EM5D and EM7D Cores Combine High-Efficiency Control and Signal Processing to Minimize Energy Use in Sensor, Voice and Audio Processing Applications

May 27, 2014Synopsys and TSMC Collaborate to Validate DesignWare IP in TSMC 16-nm FinFET Process
Silicon Success of DesignWare USB 3.0 femtoPHY, Logic Libraries and Embedded Memories in TSMC 16-nm FinFET Process Verifies Robustness of Both IP and Process

May 22, 2014Synopsys Unveils Industry's First Complete PCI Express 4.0 IP Solution
High-Quality DesignWare PHY, Controller and Verification IP for PCI Express Architecture Doubles Performance to 16 GT/s for Enterprise SoC Designs

May 08, 2014Synopsys Introduces Optimized DTS-HD Decoder for DesignWare ARC Audio Processors
Certified Decoder Supports Multiple DTS Audio Formats with High-Quality Audio Streaming for Internet-Connected Products

Apr 29, 2014Synopsys' New Silicon-Proven DesignWare USB 3.0 and USB 2.0 femtoPHY IP Cut Area by 50 Percent
Small Footprint PHYs on 14/16-nm FinFET and 28-nm Processes Reduce Silicon Cost for Consumer, Mobile, Storage and Networking Applications

Apr 23, 2014Synopsys Announces Industry's First Complete LPDDR4 IP Solution for High-Performance, Low-Power Mobile SoC Designs
PHY, Controller and Verification IP Deliver up to 3200 Mbps Speeds for High-End Smartphones and Tablets

Feb 24, 2014Synopsys Launches DesignWare ARC Software Development Platforms to Accelerate Software Development of ARC Processor-based SoC Designs
Pre-Verified Hardware and Software Platforms Integrate ARC Processors, Peripherals, Operating Systems and Software Development Tools to Enable Immediate Productivity

Feb 12, 2014Synopsys, Realtek and UMC Collaborate on Industry's First Single-Chip Ultra High Definition Smart TV SoC
Realtek's Chip Achieves First-Pass Silicon Success Using Broad Portfolio of DesignWare Logic Libraries and Embedded Memories in UMC's 40-nm Process

Feb 11, 2014Synopsys and Alango Technologies Deliver Voice Communication Package for DesignWare ARC Audio Processors
Integrated Audio Processing Solution Includes Proven Voice Enhancement Technologies that Speed Time-to-Market for Developers of Mobile and Stationary Communication SoCs

Feb 07, 2014Synopsys Acquires Target Compiler Technologies
Acquisition Expands Synopsys' Portfolio of Software Tools for the Development of ASIPs

Jan 28, 2014Synopsys Announces Immediate Availability of Multiprotocol DesignWare Enterprise 12G PHY IP
High-Performance PHY IP Supports 1.25 Gbps to 12.5 Gbps Throughput and Cuts Power Consumption by up to 20 Percent for High-End Networking and Computing Applications

Dec 16, 2013Synopsys Extends HAPS-70 Prototyping Family with New Solution Optimized for IP and Subsystems
HAPS Developer eXpress Solution with Pre-Integrated Hardware and Software Enables Fast Prototyping of Complex IP Systems

Dec 10, 2013Synopsys Demonstrates Industry's First SuperSpeed USB 10 Gbps Platform-to-Platform Host-Device IP Data Transfer
Ellisys Protocol Analyzer Confirms Performance of 10 Gbps USB 3.1 Effective Data Rates, More Than Doubling SuperSpeed USB Throughput for Consumer Applications

Dec 09, 2013Abilis Systems Achieves First-Pass Silicon Success with DesignWare ARC Processors, Interface IP and Synopsys Professional Services
Silicon-Proven DesignWare IP, Lynx Design System and Consulting Services Reduce Integration Risk and Reduce Time-to-Market by Three Months

Nov 20, 2013Synopsys New Ultra Low-Power Non-Volatile Memory IP Cuts Power by 90 Percent and Size in Half
DesignWare Multiple-Time Programmable NVM IP Reduces System Costs for Wireless and RFID / NFC Tag Applications

Nov 12, 2013Synopsys and CEVA Deliver Superior Performance, Power and Area for CEVA DSP Cores with DesignWare HPC Design Kit
HPC Design Kit of Optimized Embedded Memories and Logic Libraries Yields 8 Percent Performance Improvement and 13 Percent Leakage Power Reduction with Smaller Area for CEVA-XC DSPs

Nov 06, 2013Design & Reuse to Host TLMCentral Web Portal
Synopsys' Transfer of TLMCentral to Design & Reuse IP Portal Enables Easy Search of More Than 1000 IP Models to Speed SoC Software Development




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