Sep 30, 2015Fuji Xerox Reduces Silicon Area by More than 50 Percent Using Synopsys ASIP Designer
Synopsys' Application-Specific Instruction-Set Processor Tool Enabled Rapid Exploration and Optimization of Processor Architecture for Multi-Function Printer Application

Sep 29, 2015Synopsys Announces Industry's First Security IP Solutions for New SHA-3 Cryptographic Hash Standard
Compliant DesignWare SHA-3 Cryptography IP Protects the Integrity of Electronic Content in Applications Including Message Authentication and Digital Signatures

Sep 28, 2015TSMC Recognizes Synopsys with Partner Awards for Interface IP and Joint Development of 10-nm FinFET Design Infrastructure

Sep 22, 2015Synopsys Accelerates Development of IoT Designs with Industry's Most Comprehensive IP Portfolio
Optimized DesignWare IP Addresses Security, Wireless Connectivity, Energy Efficiency and Sensor Processing Requirements of IoT Applications

Sep 17, 2015Synopsys Successfully Tapes Out Broad IP Portfolio for TSMC 10-nm FinFET Process
DesignWare IP Portfolio for TSMC 10-nm Process Includes USB, HSIC, PCI Express, DDR, MIPI and Embedded Memories

Sep 10, 2015New DesignWare ARC EM Processors Deliver Up to 3X Higher DSP Performance
ARC EM9D and EM11D Cores Address Need for Increasing Signal Processing Bandwidth in IoT Applications

Sep 01, 2015Synopsys Announces Availability of Logic Library and Embedded Memory IP for Mie Fujitsu Semiconductor 40-nm Low-Power Process
High-Performance, Low-Power IP Enables Designers of Mobile and Consumer SoCs Using Mie Processes to Reduce Design Risk

Aug 05, 2015UFSA Compliance Test Workshop Paves the Way for Formal Certification of UFS Hosts and Devices
Industry’s first-ever vendor-independent integrated testing of UFS hosts and storage devices covers all standards used in UFS including MIPI® M-PHY®, Unipro(SM) and JEDEC® UFS protocol

Jul 29, 2015Synopsys Achieves Certification from Multiple Standards Organizations for Portfolio of IP on TSMC 16-nm FinFET Plus Process
Certified and Compliant DesignWare USB, PCI Express, HDMI, MIPI and SATA IP Ensure Functional Correctness and Minimize Integration Risk

Jul 28, 2015Synopsys Announces Industry's First USB Type-C IP Solutions
DesignWare USB-C IP Supports Reversible USB Type-C Connectors and USB 3.1, 3.0 and 2.0 Specifications

Jul 16, 2015Synopsys Acquires Bluetooth Smart IP from Silicon Vision
Asset Acquisition Expands Leading DesignWare IP Portfolio with Low-Power Wireless Interface IP for IoT Applications

Jun 29, 2015Synopsys Expands Security Solutions with Acquisition of Elliptic Technologies
Acquisition Complements DesignWare IP Portfolio with a Broad Range of Security IP

Jun 22, 2015Synopsys PCI Express IP Adds System-Level Data Protection Features for High-Performance Cloud Computing SoCs
Supports Latest 16G PCIe 4.0 Specification and Adds Features for Reliability, Availability and Serviceability

Jun 21, 2015Synopsys and UMC Expand 14-nm FinFET Collaboration to Include DesignWare Embedded Memory and Test Solutions
Collaboration Follows Silicon Success of Synopsys DesignWare Logic Libraries and Tools in First UMC 14-nm FinFET Process Qualification Vehicle

Jun 15, 2015Synopsys' IC Compiler II Accelerates Silicon Validation of Imagination's Ground-breaking PowerVR® Ray Tracing IP
Imagination's IMGworks Platform IP Group Leverages Long Standing Collaboration with Synopsys to Make Full Use of IC Compiler II's Advanced Capabilities

Jun 08, 2015Synopsys Accelerates Automotive SoC Development with Broad Portfolio of Silicon-Proven IP
Availability of ASIL B Ready IP and Investment in AEC-Q100 Testing and TS 16949 Quality Management Accelerates Qualification of Automotive SoCs

Jun 08, 2015Synopsys and TSMC Collaborate to Develop Integrated IoT Platform for TSMC 40-nm Ultra-Low-Power Process
Power-Efficient Hardware-Software DesignWare IoT Platform Accelerates Development of System-on-Chips for IoT Applications

May 21, 2015Synopsys Announces Industry's Lowest Power PCI Express 3.1 IP Solution for Mobile SoCs
Silicon-Proven, Compliant DesignWare IP Cuts Active Power Consumption to Less than 5 mW/Gb/Lane and Standby Power to Less than 10 uW/Lane

May 14, 2015Synopsys and Broadcom Expand Collaboration to Deploy ARC Processors in Multimedia and Networking Solutions
New Licensing Agreement Builds on Successful Use of ARC IP Cores in Broadcom's High-Volume Home Video Products

May 13, 2015Synopsys' Verification IP for DDR4 3DS Enables DRAM Designs with Higher Density and Performance at Reduced Power
Native SystemVerilog-based VIP for DDR4 3DS Expands Synopsys' Portfolio of Memory VIP and Offers Built-in Coverage, Protocol Checks, Verification Plan and Protocol-aware Debug

Apr 28, 2015Synopsys' New DesignWare Hybrid IP Prototyping Kits Accelerate IP Prototyping, Software Development and Integration
Combined Benefits of Virtual Prototyping and FPGA-Based Prototyping Speed Development for DesignWare IP in 64-bit ARM-Based Designs

Apr 07, 2015Synopsys Announces Immediate Availability of Broad Portfolio of Silicon-Proven IP for TSMC 16-nm FinFET Plus Processes
DesignWare IP on TSMC 16FF+ Processes Enables Designers to Accelerate Development of Mobile and Enterprise SoCs

Mar 30, 2015Synopsys Launches High-Performance Embedded Vision Processor IP
DesignWare EV Processor Family Delivers Faster Object Detection with Significantly Lower Power Consumption

Mar 25, 2015New Synopsys ASIP Designer Tool Speeds Development of Application-Specific Instruction-Set Processors by 5X
Automatic Generation of the Software Development Kit in Parallel with the Hardware Model Enables Rapid Architectural Exploration to Optimize ASIPs for Power, Performance and Area

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