DesignWare IP for Automotive ADAS 

ASIL B/D Ready IP for Advanced Driver Assistance Systems (ADAS) 

The growing demand for safety-critical driver assistance systems for pedestrian detection/avoidance, lane departure warning/correction, traffic sign recognition, surround view, drowsiness monitoring and other applications is requiring a new class of SoCs. Incorporating the latest interface standards, running multiple vision base algorithms and combining diverse sensor inputs add additional challenges for designers to support real-time multimedia, vision co-processing, and sensor fusion subsystems. The high-quality DesignWare IP portfolio with ASIL B/D certified IP accelerates SoC designers’ ISO 26262 functional safety assessments to help reach their target ASIL levels.

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  • HDMI 1.4 and 2.0 compliant controller and PHY IP
  • Configurable modes support dual-mode or Tx/Rx-only
  • Supports Mobile High-Definition Link (MHL) interface
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PCIe PHY & Controller

LPDDR4/DDR4 PHY & Controller

Ethernet AVB 10/100/1000 Controller

SATA PHY & Controller

EV Vision Processor

  • Fully programmable & configurable vision processor
  • Object detection engine for convolutional neural network
  • Supports OpenCV libraries providing >2500 functions
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Sensor and Control Subsystem

  • Optimized to process data from digital and analog sensors
  • Offload host processors for power efficient processing
  • ARC EM ISO 26262 Functional Safety Package
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AMBA Interconnect

  • Interconnect IP for ARM® AMBA® 4 AXI, ACE-lite™, AXI3™, AHB™, APB™
  • Automated AMBA subsystem assembly
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Embedded Memories and Logic Libraries

Advanced Peripherals GPIO, SPI/QSPI

  • Popular industry-standard interfaces
  • Highly configurable to meet specific design requirements
  • DMA hardware handshaking I/F compatible w/ ARM® AMBA® peripheral
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Advanced Peripherals UART

  • Popular industry standard interface
  • Highly configurable to meet specific design requirements
  • DMA hardware handshaking I/F compatible w/ ARM® AMBA® peripheral
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  • Storage Host Controller optimized for low power, high performance storage
  • Fully configurable multi-protocol support
  • Supports optional integrated DMA
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  • Achieve area and power reduction using optimized datapath logic
  • Over 40 instantiable blocks for multimedia and image processing
  • Data-tracking pipeline management technology to reduce power consumption
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  • High-performance, high-speed 10- and 12-bit at 320 MSPS ADCs
  • General-purpose, high-resolution ADCs, auxiliary DACs and VDACs
  • Ideal analog interface for automotive microcontrollers
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  • 32-bit multicore ARC processors for ADAS & infotainment
  • Add custom instructions for automotive protocols
  • Available in dual- and quad-core with I and D caches or cacheless configurations
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  • Low latency, multi-port LPDDR4 controller and PHY supporting speeds up to 3200 Mbps offers multi-port access to shared main memory, enabling protocol engines for embedded vision and high-performance heterogeneous processing.
  • Ethernet AVB Controller offers independent traffic classes and bounded latency for precisely synchronized real-time camera and sensor data.
  • MIPI D-PHY and Host Controllers for MIPI CSI-2 and DSI enables multiple interoperable camera and display scenarios to support widest range of SoC applications.
  • Security IP for cryptography and protocol acceleration including platform security and secure boot.
  • HPC Design Kit with embedded memories optimized for SoC processors: CPU, GPU and DSP are designed for demanding electro migration conditions.
  • STAR Memory System offers EEC support for multi-bit error correction.
  • Sensor & Control IP Subsystem optimized to process data from digital and analog sensors and offload host processors to enable more power-efficient processing of the sensor data is implemented using Synopsys’ 32-bit ARC® EM processor with ASIL D ISO 26262 Functional Safety Package.
  • EV Vision Processor offers multicore architecture for object detection implementing convolutional neural network (CNN) with OpenCV and OpenVX software programming environments.
  • 32-bit ARC processor and ARC EM with Safety Enhancement Package (SEP) supports ISO 26262 Functional Safety applications with integrated hardware safety features.
  • PCI Express® 3.0 controller and PHY with embedded DMA supports endpoint, root port or dual mode operation with option to choose native or AMBA interfaces to support key automotive processors.
  • SATA 6G Host and Device controller and PHY support both SATA and eSATA including AHCI programming model support multiple ports.
  • 12-bit SAR ADC offers high resolution up to 12-bit, 320MSPS ADC/DAC converters with high dynamic range and high speed for extended application range.


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