Today’s IP choices for the Universal Serial Bus (USB) cover many different types of interfaces for use in a wide variety of applications—including portable consumer products. Power consumption and small form factors are thus key issues. SoC designers must also consider new requirements imposed by smaller technology nodes, especially for the USB PHY. This paper provides insights into dealing with these issues and profiles the USB IP choices available from Synopsys.
Gervais Fong, Product Marketing Manager,Synopsys; Eric Huang, Product Marketing Manager,Synopsys

To successfully develop an AMBA™ 3 AXI™ protocol-based design in the shortest time requires a comprehensive set of synthesizable IP, verification IP and an automated method to assemble the entire SoC subsystem. The AMBA 3 Advanced eXtensible Interface (AXI) protocol builds on the benefits of the AMBA 2.0 standard offering greater performance and flexibility.
Mick Posner, Synopsys, Inc

The need for higher performance applications is driving the requirement for a new age of on-chip communication infrastructure. Increasing the clock frequency no longer addresses this higher performance requirement, as the bottleneck is inherent in the existing bus infrastructure.
Mick Posner—Synopsys, Darrin Mossor—Synopsys

This document summarizes two classes of RTL coding guidelines for the synthesis of datapaths: Guidelines that help achieve functional correctness and intended behavior of arithmetic expressions in RTL code. Guidelines that help datapath synthesis to achieve best possible QoR (Quality of Results).
Reto Zimmermann – Synopsys

This white paper provides a quantitative summary of the gains realized in Synopsys' USB OTG driver development project through the use of virtual platforms, as well as an outlook of how to apply the lessons learned from the USB OTG driver development to other connectivity IP such as SATA, Ethernet, DDR2 and DDR3.
Frank Schirrmeister, Synopsys, Inc.