DesignWare Embedded Memories and Logic Libraries 

Accelerate Innovation with Embedded Memories and Logic Libraries Solutions 

Synopsys provides a broad portfolio of high-quality, silicon-proven embedded memory and logic library solutions, enabling SoC designers to lower integration risk and speed time-to-market.

The new DesignWare® Duet Packages of Embedded Memories and Logic Libraries include memory compilers, ROMs, standard cells, Power Optimization Kits (POKs) and optional overdrive/low voltage PVTs that enable designers to achieve the maximum performance with the lowest possible power consumption for their specific application. Combined with the DesignWare STAR Memory System® solution's built-in self test (BIST) and repair technology, Synopsys offers designers a comprehensive memory and logic library IP solution for high performance, low power SoCs with reduced test and manufacturing costs.

In addition, Synopsys' embedded NVMs, which include the DesignWare AEON®/NOVeA® non-volatile memory solutions, provide a comprehensive family of multiple time programmable (MTP) and few time programmable (FTP) non-volatile memory IP in standard CMOS.

  • Products
 
  • Embedded Memories
  • Embedded SRAMs with test and repair and non-volatile memories (NVMs) 

Memory Compilers
DesignWare Memory Compilers are optimized for high performance and high density with advanced power management features. Integrated STAR Memory System for detection and repair of manufacturing faults improves yield.


Non-Volatile Memory
Multiple time programmable (MTP) and few time programmable (FTP) embedded non-volatile memories for a broad range of process technologies.


Memory Test and Repair
The DesignWare STAR Memory System is a comprehensive, integrated test, repair and diagnostics solution that supports repairable and non-repairable embedded memories across any foundry or process node.

  • Logic Libraries
  • Logic libraries for a wide array of applications and process technologies 

Standard Cell Libraries
DesignWare Standard Cell Libraries provide high-speed (HS), high-density (HD) and ultra high-density (UHD) architectures to optimize circuits for performance, power and area tradeoffs.


Power Optimization Kits (POKs)
Minimizing power consumption while sustaining optimal performance and are available for DesignWare Logic Libraries at 65-nm and below


Engineering Change Order (ECO) Kits
The metal programmable cell libraries, available in high-speed and high-density architectures, are most beneficial to designers who are looking for a foundation for low-cost mask designs.



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