Insight: ASIP Designer: "Shift-Left" Solution for Customer-Specific Processors and Programmable Hardware Accelerators
In this article, learn how Conexant took a tool-based approach to create an application-specific instruction-set processor (ASIP) and built a highly differentiated DSP processor for Far-Field Voice processing in less than a year.
Jul 21, 2015

Insight: Designing Application-Specific Processors for Wireless Baseband SoCs
Traditional SoC architectures are unable to support the performance and power demands of software defined radio (SDR). Learn how imec, Fujitsu and ICT have used Synopsys' ASIP design tools to support their SDR projects.
Sep 30, 2014

Hardware Accelerators Earn Their Keep
Hardware accelerators have been used for years, but with the proliferation of multicore chips and SoCs their use is evolving. Multicore processors have reduced the reliance on hardware accelerators, but that doesn't mean the number of hardware accelerators is shrinking.
Aug 01, 2013

Developing Embedded Vision Systems
Markus Willems, senior product marketing manager at Synopsys, explains why application-specific processors will be found at the heart of most embedded vision systems and how Synopsys’ Embedded Vision Development System enables design teams to quickly meet their power, performance and programmability goals when implementing such systems.
Jul 17, 2013

Embedded Vision: Systems that See and Understand
What do products such as Microsoft's Kinect game controller, Mercedes' pedestrian detection system, and automatic panorama-stitching photo apps have in common? They all have embedded vision – they can "see" and "understand". Jeff Bier, founder of the Embedded Vision Alliance, provides an update on the market potential for embedded vision applications.
Jul 17, 2013

Workload-tuned cores seeing greater interest
Optimizing the instruction set and RTL of a design implements the exact resources necessary, and minimizes power consumption by omitting unnecessary functional blocks from the core. Processor Designer brings several toolsets together into a single environment to aid in understanding the underlying workload in data and compute intensive algorithms like vision, and tuning a core appropriately to get the job done.
Jun 30, 2013

Prediction for 2013 - Technology
We will see an increase in embedded vision technology, making machines see and understand their environment. Computer vision algorithms have been a long standing research topic and now they make their way into embedded devices thanks to increased embedded processor performance.
Jan 03, 2013

30 years of DSP: From a child's toy to 4G and beyond
Dec 18, 2011, marked the 25th anniversary of EDA provider Synopsys Inc, which has been both witness to and participant in the evolution of signal processing.
Aug 27, 2012

An Efficient ASIP Design Methodology
An Efficient ASIP Design Methodology
Aug 09, 2010

Potential of using block floating point arithmetic in ASIP-based GNSS-receivers
This paper uses the block floating point format to realize the position estimation algorithm in Global Navigation Satellite System (GNSS) receivers. The precision of this novel approach is quantified by extensive simulations using synthetic as well as real GNSS data. The implementation of the position estimation algorithm using block floating point format on an application specific processor is introduced and compared to implementations on a standard embedded processor and in standard floating point arithmetic in terms of performance and costs.
Jun 09, 2010

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