The DesignWare® ARC® EM Family of embedded processor cores is based on the scalable ARCv2 Instruction Set Architecture (ISA) and is optimized for performance efficiency (DMIPS/mW and DMIPS/mm2). The ARC EM family includes the EM4 (cacheless) and EM6 (instruction and data caches) processor cores, designed for use in power and area-sensitive embedded applications. They offer industry-leading performance efficiency of up to 1.77 DMIPS/MHz, with minimal area and power consumption.
The EM Processors are highly-configurable and extensible, enabling designers to implement each core with the optimum combination of performance, code density, area and power consumption for the specific task or application.
The EM Family of processor cores is supported by a robust ecosystem of software and hardware development tools, including an easy to use and low-cost ARC EM Starter Kit for early software development, the MQX real-time operating system (RTOS), and a portfolio of third-party tools, operating systems and middleware from leading industry vendors through the ARC Access Program.
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