Memories and Logic Libraries

Developing High-Reliability Reprogrammable NVM IP for Automotive Applications
To help IC designers understand the complexities in developing the highest reliability non-volatile memory (NVM) IP for automotive applications, this white paper will review key considerations from design to test, including: key reliability specifications, designing-in reliability, and demonstrating reliability through characterization, qualification, and reliability testing. This paper helps IC designers make informed choices for their automotive designs, from developing the NVM IP in-house to selecting the optimal IP supplier.
Martin Niset, Senior Engineering Manager, Synopsys, Inc.; Craig Zajac, Senior Product Marketing Manager, Synopsys, Inc.

CPU, GPU and DSP Core Optimization for High Performance and Low Power
Each new process technology provides opportunities to optimize CPU, GPU and DSP processor core implementations to achieve better performance, power and area (PPA) results. This paper provides guidelines for establishing core design targets, selecting a design kit of standard cells and embedded memories and using implementation best practices to achieve PPA targets most efficiently.
Ken Brock, Product Marketing Manager, Synopsys, Inc.

FinFET Technology – Understanding and Productizing a New Transistor From TSMC and Synopsys
This white paper discusses the major challenges with FinFETs and how TSMC has been collaborating with Synopsys, one of their ecosystem partners, to deliver a complete solution. Key elements of this solution include comprehensive FinFET profiling without impact to design tool runtime and proven, verified IP availability. The TSMC 16-nm FinFET solution will ensure mutual customers swiftly move to building the next generation SoCs.
Jason S.T. Chen, TSMC; Andy Biddle, Synopsys

From Design to Test: Developing High-Reliability MTP NVM
In developing high-quality and reliable MTP NVM, NVM IP providers must account for design and architectural considerations as well as comprehensive silicon testing. To help system-on-chip (SoC) designers select the highest reliability NVM IP, this white paper will review the key considerations involved in the entire process from design to test, including: key reliability specifications; designing-in reliability; and demonstrating reliability through characterization, qualification, and reliability testing.
Martin Niset, Senior Engineering Manager, Synopsys, Inc.; Craig Zajac, Senior Product Marketing Manager, Synopsys, Inc.

Designing with FinFETs: The Opportunities and the Challenges
Although planar CMOS technology continues to scale to 20-nanometer (nm) and beyond, FinFET technology offers superior attributes and demonstrates better results in the areas of performance, leakage and dynamic power, intra-die variability, and retention voltage for SRAMs. Although FinFETs are emerging as the device technology of choice at these advanced nodes, they introduce new design challenges that require knowledge of and experience in designing with FinFETs to ensure design success.
Jamil Kawa, R&D Group Director, Synopsys, Inc.

Emerging MTP NVM Applications in Mobile Multimedia and Digital Home Electronics
Consumer electronics applications, like NFC and HCMI, are driving the need for embedded multiple-time programmable (MTP) non-volatile memory (NVM) at advanced nodes. This whitepaper will help system architects and SoC designers explore the MTP NVM options available for their consumer electronics SoCs. It will address key consumer applications and requirements driving the need for embedded MTP; capabilities and limitations of embedded MTP technologies; and the alignment between MTP technologies and application requirements.
Craig Zajac, Senior Product Marketing Manager, Synopsys, Inc.

Protect Your Electronic Wallet Against Hackers: Securing Critical Data in Consumer and Multimedia Mobile Devices with NFC technology using Non-volatile Memory IP
Although it is impossible to prevent hackers from trying to attack systems, making the wrong selection in NVM technology to store security and encryption keys can leave a system even more vulnerable to attacks. This whitepaper will help SoC designers gain familiarity with the options and trade-offs of the various NVM IP on the market today in order to make the right selection, ensuring the maximum security of their system data, by addressing: the main technologies used in NVM IP today for data storage, the common reverse engineering techniques of most concern to designers developing secure elements for NFC, and the most resistant NVM IP technology to reverse engineering schemes.
Craig Zajac, Senior Product Marketing Manager, Synopsys, Inc.

Demystifying Non-volatile Memory IP: Selecting the Right NVM IP for SoC Designs Targeting Wireless, Analog, Micro-electro-mechanical Systems and Security Applications
As the use of non-volatile memory (NVM) intellectual property (IP), particularly reprogrammable NVM IP, expands beyond traditional embedded flash applications such as microcontrollers and into wireless, analog, micro-electro-mechanical systems (MEMS) and security applications, an entirely new audience of designers is integrating NVM. For these new users, there are various NVM IP usage models and solutions currently available that are optimized to meet the requirements of these different applications. When selecting the right NVM IP solution, designers must take into consideration the specifications associated with the NVM IP as well as its nuances and overall impact on the system-on-chip (SoC) design.
Craig Zajac, Senior Product Marketing Manager, Synopsys, Inc.



NewsArticlesBlogsWhite PapersWebinarsVideosNewslettersCustomer Successes