DesignWare Verification IP with the VMM Methodology Shortens Testbench Development Time for DSP Group
"Using the VMM for SystemVerilog saved us months on development time. Having DesignWare Verification IP, which supported this methodology, was also critical for this project."
Dany Brown, Verification Team Leader, DSP Group

Tarari uses High Quality DesignWare Verification IP for PCI Express to Increase Time-to-Market by Three Months
"Synopsys' proven DesignWare Verification IP gave us a huge schedule advantage by enabling us to develop the verification environment in just three months versus the six in our previous project."
Samir Patel, Sr. Design and Verification Engineer, Tarari

Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success
"We received first samples in early December, and immediately had critical high-speed interconnect IP and processor cores running successfully. Within another week, our most complex logic was fully operational."
Maher Fahmi, VP Silicon Engineering, Teradici

Synopsys DesignWare® Ethernet VIP Saves Two Months Time to Market on Commex Chip
"You need a supplier you can count on to create a verification environment that's trustworthy. Synopsys has that kind of credibility."
Avi Ganor, Vice President of R&D, Commex

Pixim Catches Bugs Early in Design Cycle, Improving Time-to-Market with Synopsys VCS Verification Library IP for AMBA
"I believe VCS Verification Library IP helped us identify design flaws that would have been missed had we relied on other methods to validate our AMBA-based interfaces. VCS Verification Library IP allowed us to avoid last minute repairs or, worse yet, a silicon re-spin."
David Jenne, Design Verification Manager, Pixim, Inc.

S3 Graphics Saved Two Months of Verification Time with Synopsys DesignWare Verification IP
"We chose DesignWare® Verification IP for PCI Express® because it is easy to use, has high quality, and is backed by a leading IP provider with the infrastructure to support it."
David Fong, Engineering Manager, S3 Graphics

Netsilicon uses DesignWare Verification IP for Design Success
"If there’s one certainty in our business, it’s that each new chip will be more complex than the last one. Our positive experiences on the Mercury project have established a solid foundation for verification success upon which we will continue to build with effective reuse along with newer generations of Synopsys technology."
Brad Hollister, Verification Lead, NetSilicon



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