Feb 03, 2016Synopsys' 10 Gbps USB 3.1 IP First to Pass USB-IF Certification
USB-IF Certified IP Ensures Interoperability and Lowers Integration Risk for High-Performance, Low-Power SoC Designs

Feb 01, 2016Synopsys Delivers Industry's First SAS 24G Verification IP for Enterprise Storage Systems
First Verification IP Product Line That Includes All SAS Interface Speed Configurations

Jan 27, 2016Synopsys Launches New IP Subsystem to Accelerate Data Fusion Processing in IoT Devices
DesignWare Smart Data Fusion IP Subsystem Integrates Latest ARC EM DSP Processors, Peripherals and Software to Boost Signal Processing Performance and Reduce Energy Consumption

Jan 26, 2016Synopsys Introduces USB 3.1 Type-C IP with DisplayPort 1.3 and HDCP 2.2 for High-Bandwidth Data Transfer with Content Protection
DesignWare IP Solution Accelerates Development of SoCs Delivering Secure Video, Data and Power over a Single USB Type-C Connector

Jan 25, 2016Synopsys Platform Architect MCO Delivers Industry's First Power-Aware Architecture Analysis Tool Supporting IEEE 1801-2015 UPF 3.0
Solution Enables Efficient Reuse of UPF 3.0 System-Level IP Power Models for Early Analysis of SoC Architectures for Power and Performance

Jan 06, 2016Synopsys DesignWare IP Enables First-Pass Silicon Success for SK Hynix Universal Flash Storage Device
High-Quality IP Enables Integration in Two Weeks and Speeds Time to Volume

Dec 17, 2015iCatch Technology Selects Synopsys' DesignWare IP Portfolio for Digital Video and Image SoCs
High-Quality IP Combined with Synopsys' HAPS-70 FPGA-Based Prototyping System and Professional Services Accelerate Time-to-Market

Dec 09, 2015MIPI UniPro Interoperability Test Workshops Advance Industry Adoption of High-Speed, Low-Power Mobile Interface Solutions
Second Testing Event of the MIPI UniPro℠ and MIPI M-PHY® Specifications Demonstrates Mature, Efficient Implementation for Industry Adopters and Highlights UFS-Enabled Applications

Dec 09, 2015NBASE-T Alliance Celebrates One-Year Anniversary With New Specifications and Members
Alliance Puts Standardization and Product Development on Fast Track

Nov 27, 2015SGS-TÜV Saar Certifies Ethernet QoS Controller IP from Synopsys According to ISO 26262

Nov 23, 2015Synopsys Delivers Industry's First Ethernet 400G Verification IP for Next-Generation Networking and Communications Systems
Native SystemVerilog Ethernet VIP Features Built-in Coverage, Verification Planning, Protocol-Aware Debug and Source Code Test Suites

Nov 10, 2015Synopsys Enables Next-Level of Productivity with Addition of System-Level Capabilities to Verification IP for ARM Cache Coherent Protocols
Expands Comprehensive VIP library for ARM® AMBA® protocols with System-Level Test Suites, System Monitor, Protocol-aware Debug and Performance Analysis; Adds VIP for New AMBA 5 AHB5 Standard

Nov 04, 2015Synopsys Introduces Enhanced Security Package for DesignWare ARC EM Processors
New Option Enables Implementation of a Trusted Execution Environment on a Single, Ultra-Low Power ARC EM Core

Oct 21, 2015Synopsys Demonstrates Industry's First MIPI D-PHY IP Operating at 2.5 Gbps per Lane on TSMC 16-nm FinFET Plus Process
Demonstration Validates Performance and Compliance of DesignWare MIPI D-PHY for Low-Risk Integration into Mobile SoCs

Oct 12, 2015Imagination rolls out complete Ensigma connectivity IP solutions from baseband to RF
Flexible licensing and support models speed customers’ time to market

Oct 05, 2015Synopsys Test Solution Certified for the Most Stringent Level of Automotive Safety Measures Defined by the ISO 26262 Standard
Provides Highest Degree of Safety-Related Confidence and Accelerates Functional Safety Qualification

Sep 30, 2015Fuji Xerox Reduces Silicon Area by More than 50 Percent Using Synopsys ASIP Designer
Synopsys' Application-Specific Instruction-Set Processor Tool Enabled Rapid Exploration and Optimization of Processor Architecture for Multi-Function Printer Application

Sep 29, 2015Synopsys Announces Industry's First Security IP Solutions for New SHA-3 Cryptographic Hash Standard
Compliant DesignWare SHA-3 Cryptography IP Protects the Integrity of Electronic Content in Applications Including Message Authentication and Digital Signatures

Sep 28, 2015TSMC Recognizes Synopsys with Partner Awards for Interface IP and Joint Development of 10-nm FinFET Design Infrastructure

Sep 22, 2015Synopsys Accelerates Development of IoT Designs with Industry's Most Comprehensive IP Portfolio
Optimized DesignWare IP Addresses Security, Wireless Connectivity, Energy Efficiency and Sensor Processing Requirements of IoT Applications

Sep 17, 2015Synopsys Successfully Tapes Out Broad IP Portfolio for TSMC 10-nm FinFET Process
DesignWare IP Portfolio for TSMC 10-nm Process Includes USB, HSIC, PCI Express, DDR, MIPI and Embedded Memories

Sep 10, 2015New DesignWare ARC EM Processors Deliver Up to 3X Higher DSP Performance
ARC EM9D and EM11D Cores Address Need for Increasing Signal Processing Bandwidth in IoT Applications

Sep 01, 2015Synopsys Announces Availability of Logic Library and Embedded Memory IP for Mie Fujitsu Semiconductor 40-nm Low-Power Process
High-Performance, Low-Power IP Enables Designers of Mobile and Consumer SoCs Using Mie Processes to Reduce Design Risk

Aug 05, 2015UFSA Compliance Test Workshop Paves the Way for Formal Certification of UFS Hosts and Devices
Industry’s first-ever vendor-independent integrated testing of UFS hosts and storage devices covers all standards used in UFS including MIPI® M-PHY®, Unipro(SM) and JEDEC® UFS protocol

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