| Jan 27, 2010 | Synopsys Showcases Silicon-Proven DesignWare IP Solutions for SuperSpeed USB 3.0, DDR and PCI Express at DesignCon 2010
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| Jan 27, 2010 | Synopsys Offers Designers Many Opportunities for Design Success at EDSFair
Engineers to Learn About the Latest Technology Developments in Design, IP and Manufacturing Solutions |
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| Jan 24, 2010 | Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions
Silicon-Proven 3G DigRF, CSI-2 Controller and D-PHY Accelerate Development of Mobile Devices |
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| Jan 24, 2010 | Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies
IP Supports HDMI Ethernet and Audio Return Channel, 3D Formats, Real-Time Content Signaling, 4K x 2K Resolution Mode, and 10.2 Gbps Aggregate Bandwidth |
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| Jan 12, 2010 | Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs
New Verification IP Capability Speeds Time-to-Market by Simplifying Debug of USB 3.0 Interfaces |
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| Nov 23, 2009 | Synopsys Expands DesignWare Data Converter IP Portfolio with 40-nm Solutions
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| Oct 28, 2009 | Synopsys Unveils 30 Percent Smaller Area, Low Power USB 2.0 PHY IP for 28-nm Processes
Connectivity IP Leader Continues to Innovate with the DesignWare USB 2.0 picoPHY - The First PHY IP to Support USB 2.0 Battery Charging v1.1 and OTG 2.0 Specifications |
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| Oct 27, 2009 | Synopsys Announces 40th DesignWare Audio Codec IP
Broad DesignWare Audio IP Portfolio Shipped in More Than 100 Million Units |
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| Oct 06, 2009 | Synopsys DesignWare USB 2.0 and Ethernet IP Enables First-Pass Silicon Success for STMicroelectronics
High-Quality DesignWare IP Speeds Time-to-Market for STM32 Connectivity Line of SoCs |
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| Sep 21, 2009 | MEDIA ADVISORY/ALERT: Synopsys First IP Vendor to Demonstrate SuperSpeed USB 3.0 Host, Hub and Device IP in a Single Demonstration
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| Sep 09, 2009 | Synopsys First to Announce DDR3 IP with Support for 2133 Mbps Data Rates and 1.35V DDR3L
DesignWare DDR3/2 PHY and Controller IP Address Both Performance and Low Power Enhancements Planned for the DDR3 SDRAM Standard |
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| Aug 12, 2009 | Synopsys Delivers Comprehensive HDMI IP Solution for 90-nm to 40-nm Process Technologies
Connectivity IP Leader Broadens DesignWare IP Portfolio with Silicon-Proven, Compliant HDMI Transmitter and Receiver Controllers and PHY IP |
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| Jul 19, 2009 | Synopsys' New DesignWare IP Slashes Power in Datapath Circuits
DesignWare minPower Components Significantly Extend Battery Life in Mobile Applications and Reduce Power Consumption for High Performance SoCs |
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| Jul 14, 2009 | Synopsys Accelerates Development of System-On-Chip Designs With Complete IP Solution for PCI Express 3.0
High-Quality DesignWare IP for PCI Express 3.0 Delivers 8.0 GT/s for High-Performance Enterprise Computing Systems |
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| Jun 08, 2009 | Synopsys Enables System Design Interoperability with System-Level Catalyst Program
Synopsys today announced its System-Level Catalyst Program to accelerate the adoption of system-level design and verification. |
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| Jun 03, 2009 | Synopsys Announces First DDR3 IP Verified in Silicon at 1600 Megabits per Second
DesignWare DDR3 PHY and Controller IP Validates Interoperability with JEDEC Compliant DDR3-1600 SDRAMs and DDR3 DIMMs |
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| May 26, 2009 | Synopsys Releases DesignWare SATA IP for New SATA 6Gbps Data Transfer Rate
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| May 14, 2009 | Synopsys Demonstrates DesignWare SuperSpeed USB 3.0 Controller IP at the SuperSpeed USB Developer's Conference
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| Apr 14, 2009 | Synopsys Introduces Lower Power, High-Performance Architecture for AMBA 3 AXI On-Chip Interconnect
New DesignWare IP Hybrid Architecture Reduces Area, Power Consumption and Routing Congestion for High-Performance AMBA Interconnect-Based Designs |
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| Mar 10, 2009 | Synopsys DesignWare USB 2.0 nanoPHY and PCI Express 1.1 PHY IP First to Achieve Compliance in UMC’s 65-Nanometer Process Technologies
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| Mar 04, 2009 | Synopsys DesignWare IP for PCI Express First IP to Pass Agilent Technologies' Inline Error Injection Testing
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| Feb 24, 2009 | Synopsys Enhances DesignWare DDR PHY IP with Service to Verify Signal Integrity
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| Feb 10, 2009 | New DesignWare Verification IP Alliance Program Expands Availability of High-Quality VMM-Enabled Verification IP
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| Feb 03, 2009 | Synopsys Expands DesignWare SuperSpeed USB IP Offering With xHCI Host Controller
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