Taiwan 

Office Location 
Taiwan

Synopsys Taiwan Co., Ltd. (Hsinchu)
No.25, Industry East Road IV,
Science-Based Industrial Park,
Hsinchu 300, Taiwan
Tel: +886-3-579-4567
Fax: +886-3-579-9000
Email: tw_feedback@synopsys.com

Synopsys Taipei
Room 3108, 31F,
333 Keelung Road, Section 1
Taipei 110, Taiwan
Tel: +886-2-2345-3020
Fax: +886-2-2757-6009
Email: tw_feedback@synopsys.com


Workshop Schedule 2014

Date Location Workshop Cost
Dec 11-12 Hsinchu Star-RC NTD 10,000
Dec 17-18 Hsinchu Hspice Essentials NTD 10,000
Dec 19 Taipei Custom Environment (including Custom WaveView, CustomExplorer & CustomExplorer Ultra) NTD 5,000
Jan 07-08 Hsinchu Formality (Functional Equivalence Checking) NTD 10,000
Jan 09 Hsinchu CustomSim (XA) NTD 5,000
Jan 13-14 Hsinchu VCS(including Code Coverage and DVE) NTD 10,000
Jan 15-16 Hsinchu SiliconSmart NTD 10,000
Jan 21-23 Hsinchu Design Compiler NTD 15,000
Jan 22-23 Taipei PrimeRail NTD 10,000
Jan 28-30 Hsinchu SystemVerilog Testbench NTD 15,000
Jan 28-30 Taipei IC Compiler NTD 15,000
Feb 04-06 Hsinchu PrimeTime NTD 15,000
Feb 05-06 Taipei Hspice Advanced Topics NTD 10,000
Feb 11-13 Hsinchu IC Compiler 1 NTD 15,000
Mar 05-06 Hsinchu FineSim NTD 10,000
Mar 11-13 Hsinchu UVM NTD 15,000
Mar 12-13 Taipei Star-RC NTD 10,000
Mar 17 Hsinchu SystemVerilog Assertions NTD 5,000
Mar 18-20 Hsinchu DFT Compiler NTD 15,000
Mar 19-20 Taipei Hspice Essentials NTD 10,000
Mar 25-27 Hsinchu IC Compiler SoC DP NTD 15,000
Apr 09-10 Hsinchu PrimeRail NTD 10,000
Apr 15 Taipei CustomSim (XA) NTD 5,000
Apr 15-17 Hsinchu TetraMAX NTD 15,000
Apr 16-17 Taipei VCS (Functional Equivalence Checking) NTD 10,000
Apr 21 Hsinchu Custom Environment (including Custom WaveView, CustomExplorer & CustomExplorer Ultra) NTD 5,000
Apr 22-24 Taipei SystemVerilog Testbench NTD 15,000
Apr 22-24 Hsinchu TetraMAX NTD 15,000
May 14-15 Hsinchu VMM NTD 10,000
May 14-15 Taipei Formality (Functional Equivalence Checking) NTD 10,000
May 20-22 Taipei Design Compiler NTD 15,000
May 21-22 Hsinchu SiliconSmart NTD 10,000
May 27 Hsinchu Design Compiler 2: Low Power NTD 5,000
May 27-29 Taipei IC Compiler NTD 15,000
May 28-29 Hsinchu Star-RC NTD 10,000
Jun 02-03 Hsinchu Hspice Essentials NTD 10,000
Jun 04-05 Hsinchu FineSim NTD 10,000
Jun 05 Taipei SystemVerilog Assertions NTD 5,000
Jun 10-12 Hsinchu PrimeTime NTD 15,000
Jun 24-26 Hsinchu IC Compiler NTD 15,000
Jul 02-03 Hsinchu VCS (Functional Equivalence Checking) NTD 10,000
Jul 09-10 Hsinchu Hspice Advanced Topics NTD 10,000
Jul 17 Hsinchu CustomSim (XA) NTD 5,000
Jul 22-24 Hsinchu SystemVerilog Testbench NTD 15,000
Jul 23-24 Taipei Star-RC NTD 10,000
Jul 29-31 Taipei UVM NTD 15,000
Aug 05 Hsinchu Custom Environment (including Custom WaveView, CustomExplorer & CustomExplorer Ultra) NTD 5,000
Aug 06-07 Hsinchu PrimeRail NTD 10,000
Aug 06-07 Taipei SiliconSmart NTD 10,000
Aug 12-14 Hsinchu DFT Compiler NTD 15,000
Aug 26 Hsinchu SystemVerilog Assertions NTD 5,000
Aug 26-28 Hsinchu IC Compiler NTD 15,000
Aug 27-28 Hsinchu VMM NTD 10,000
Sep 03-04 Hsinchu Hspice Essentials NTD 10,000
Sep 09-11 Hsinchu Design Compiler NTD 15,000
Sep 17-18 Hsinchu Formality (Functional Equivalence Checking) NTD 10,000
Sep 23-24 Hsinchu Star-RC NTD 10,000
Oct 14-16 Hsinchu UVM NTD 15,000
Oct 14-16 Taipei PrimeTime NTD 15,000
Oct 21-23 Hsinchu TetraMAX NTD 15,000
Oct 22-23 Taipei FineSim NTD 10,000
Oct 28-30 Hsinchu IC Compiler NTD 15,000

** Synopsys reserves the right to cancel or re-schedule the workshops **

Daily Class Time: 9:30am - 5:00pm
Download Training Schedule (PDF)

Registration

Registration Form(PDF)
Please fax registration forms to the following number.
Fax: (03)579 9000
Tel: (03)579 4567 ext. 30303 Ms. Chen