Issue 1 - 2013
Partner Highlight
Multi-Gigahertz FPGA Signal Processing
Design teams from Xilinx and Synopsys know the importance of creating parallel architectures to accelerate signal processing applications on FPGA devices. In this article, learn how an FPGA clocked at 500MHz can support FFTs with gigasample per second data throughput rates.
Technology Update
Going 3D by Evolution Rather Than Revolution: 2.5D, 3D, 5.5D-IC and Beyond
3D-IC is one of today’s newest and most exciting technologies. In this article, Steve Smith, Senior Director of Marketing for 3D-IC Strategy at Synopsys, discusses how 3D-IC has become the technology for the future rather than the technology of the future.
Verdi3™ - The Industry’s Open Debug Platform
Learn how the open architecture of the Verdi3 system enables design and verification teams to accelerate their innovation by offering a fully integrated and predictable environment including out-of-the-box support for a wide range of leading simulators, emulators, FPGA-prototyping solutions, model checkers, formal analysis engines and virtual platforms.
Power-Area Tradeoffs for Parallel Signal Processing Architectures
Engineers working on datapath designs for high-speed signal processing must create architectures to meet the application’s performance and power needs. Learn how some of Synopsys’ signal processing flows can create and explore parallel architectures to address this challenge.
Creating Highly Reliable FPGA Designs
In this article, learn how Synopsys’ Synplify FPGA synthesis software can help engineers protect their FPGA designs from radiation-induced soft errors.
Embedded Memory Test & Repair at 20-nm Nodes and Below
Read how Synopsys’ DesignWare STAR Memory System 5 is designed to specifically address the design and manufacturing challenges at 20-nm and below technologies while meeting overall cost, quality, and schedule goals.
Executive Insights
SNUG – A Global Community Focused on Accelerating Innovation
In this video interview, Dave Reda, Sr. Director, Global Technical Services at Synopsys, has a conversation with the new Technical Chair for SNUG Silicon Valley, Jonah Probell, Senior Solutions Architect at Arteris. Tune in to learn about the 2013 global SNUG program.
Standards Column
Accelerating Innovation with Standards
Does innovation happen only when thinking outside the box? In this article, learn how standards help engineers accelerate innovation.
Synopsys Innovation Update
Latest News on Products, Technologies, Services and Solutions to Help Accelerate Innovation
Learn about some of the recent innovations Synopsys is providing its customers to help accelerate the development of better products sooner and more cost effectively.
Special Announcement
Synopsys’ ARC EM Starter Kit Accelerates Embedded Software Development
Learn how Synopsys’ easy-to-use ARC EM starter kit enables engineers to start writing, porting, debugging, and analyzing their critical code earlier in the design cycle to help accelerate innovation.
Issue 4 - 2012
Customer Highlight
Using Advances in Synthesis Technology to Cut Implementation Time
Small-geometry effects can undermine design productivity and offset the integration benefits of SoCs unless these effects are accounted for during RTL synthesis. In this article, experts from IDT and Synopsys discuss how innovations in Design Compiler Graphical have minimized design iterations and cut implementation time at IDT.
Technology Update
The Past, Present and Future of DDR4 Memory Interfaces
Learn about the challenges designers face when making the step up to DDR4, and how Synopsys' IP solutions will help them to transition to the latest JEDEC standard for commodity DRAM.
Accelerate Software Development with High-Performance FPGA-based Prototyping
Today's ASIC and SoC design teams face challenges of short delivery schedules and high risk of chip defects. With the release of HAPS-70, a tightly integrated hardware plus software tools solution, Synopsys' FPGA-based prototyping solution enables faster pre-silicon software development and better system-level validation from IP individual blocks to complete SoCs.
Complete Audio Solutions with ARC Processors
As consumers demand higher quality sound from their devices, the audio software that design teams use is becoming increasingly important. Learn how Synopsys' SoundWave Audio Subsystem is enabling developers to benefit from certified code for audio processing and what this means for the end users.
Improving Compute Farm Efficiency for EDA
As chip complexity and schedule pressures grow, ensuring server farms have adequate CPU and memory resources for timely and successful job execution is critical. Learn how Adaptive Resource Optimizer (ARO) can assist design teams to make better use of all of their available compute resources.
Executive Insights
Accelerating SoC Verification
In this video interview with George Zafiropoulos and Michael Sanie, hear about Synopsys' solution for SoC designers as well as Synopsys' verification strategy with the recent SpringSoft and EVE acquisitions.
Synopsys Innovation Update
Latest News on Products, Technologies, Services and Solutions to Help Accelerate Innovation
Learn about some of the recent innovations Synopsys is providing its customers to help accelerate the development of better products sooner and more cost effectively.
Standards Column
OpenStand: Measuring up in Design Automation Standards
With the recent public introduction of the Modern Standards Paradigm, OpenStand, Yatin Trivedi, director of standards and interoperability programs at Synopsys, shares his perspectives on how closely the design automation community follows these principles.
Special Announcement
Ace the Verification of Multicore SoCs
Learn how using the right VIP can help engineers to quickly and efficiently verify complex multicore systems that incorporate cache coherency based on the ARM® AMBA® ACE™ protocol.
Issue 3 - 2012
Partner Highlight
Achieving Faster Design Closure with Early RTL Exploration
Learn as experts from AMD and Synopsys discuss how early RTL exploration with Synopsys' DC Explorer can accelerate the development of high-quality RTL and constraints.
Managing Design Density for Improved Manufacturability and Faster Closure at Advanced Nodes
IC designers are familiar with metal fill as a requirement for improving the planarity of wafers and die and enhancing overall lithographic error margin. Synopsys and AMD discuss the challenges of density management and introduce Fill-to-Target (FTT) technology in IC Validator.
Technology Update
FinFET: The Promises and the Challenges
One of the newest and most exciting technologies in the industry today is FinFET, but as new challenges around FinFETs arise, new solutions must follow. Learn how experts from Synopsys are working with foundry partners and design teams alike to accelerate this innovative technology.
Next-Generation Xilinx FPGA Flows: Gaining Success Using Synopsys Tools with Xilinx Vivado Place-and-Route Software
The pairing of Xilinx's new Vivado Design Suite with Synopsys' Synplify FPGA synthesis tools enables designers to achieve more capacity and shorter turnaround times from their Xilinx 7 Series FPGA design flows. In this article, Angela Sutton explains how these two products complement each other and accelerate innovative designs.
The Benefits of Static Timing Analysis-Based Memory Characterization
NanoTime is Synopsys' advanced transistor-level static timing analysis tool for custom design and embedded memories. Learn how a breakthrough memory feature addition to NanoTime enables designers to effectively analyze complex transistor circuits and embedded memories overnight.
Building High-Performance Interfaces for Storage, Camera and Displays Using UniPro and UFS Controller IP
Learn about Synopsys' new IP for storage, camera and display interfaces as Hezi Saar discusses DesignWare UFS and UniPro controllers and what the new IP will offer to design teams.
Virtual Prototyping Goes Mainstream
For engineers developing software, easy to use virtual prototyping tools are crucial to get their designs to market faster with higher-quality solutions. In this article, Nithya Ruff discusses the benefits of Synopsys' Virtualizer to accelerate innovation.
Building an IP-XACT Design and Verification Environment with DesignWare IP
Learn about the IP-XACT standard, how to build and generate IP-XACT IP, and get the IP-XACT view of your components' configuration.
A Simple Way to Use DesignWare Libraries in FPGA-Based Design Prototypes
When prototyping an ASIC within an FPGA, designers must determine how to handle design RTL source files comprising instantiated DesignWare Library Building Block IP, Microcontrollers and AMBA On-Chip Bus IP. This article describes how to implement DesignWare IP in an FPGA-based prototype using a single set of ASIC RTL to drive FPGA synthesis.
Executive Insights
Video Interview with Frank Lee – An Introduction to FinFET Design Tools
Hear from Frank Lee, Vice President of Engineering for Synopsys' Analog Mixed Signal Business Group, as he talks about how Synopsys can help designers accelerate innovation in advanced design nodes with FinFET.
Synopsys Innovation Update
Latest News on Products, Technologies, Services and Solutions to Help Accelerate Innovation
Learn about some of the recent innovations Synopsys is providing its customers to help accelerate the development of better products sooner and more cost effectively.
Standards Column
Global Standards Development Requires Sound Fundamentals
Learn about the development of global technical standards and how the need for a formal setting is imperative for EDA and IP standards development.
Special Announcement
Connect with Experts at VIP-Central.org
If you are a SoC engineer or a user of verification IP, VIP-Central.org is your go-to resource for protocol-based verification. In this article, Neill Mullinger gives a brief overview of Synopsys' new technical community website.
Issue 2 - 2012
Partner Highlight
Get a Head Start: Early Software Bring-up for ARM big.LITTLE Processing
Learn from experts at Synopsys and ARM how VDKs can help speed up software bring-up for ARM big.LITTLE processing designs.
Technology Update
Delivering Great Audio with an SoC-Ready IP Subsystem
Learn how a complete, pre-integrated and pre-verified audio IP subsystem consisting of hardware, software and prototyping reduces SoC integration effort, lowers design risk and accelerates time-to-market.
The Best of Both Worlds for SoC Prototyping
Learn how Synopsys' Hybrid Prototyping solution seamlessly integrates virtual and FPGA-based prototyping environments to speed software development, hardware and software integration, and system validation.
Low Power is Everywhere
Lowering power consumption extends beyond mobile devices. Today, low-power requirements apply to designs for almost every market segment. Learn about top challenges, recent industry trends, and how low-power solutions from Synopsys help to address consumer demand.
Executive Spotlight
A Perspective on How Standards are Enabling 'Better, Sooner, Cheaper' Designs
Karen Bartleson, 2012 President-elect of the IEEE Standards Association and Senior Director of Community Marketing at Synopsys, talked with Synopsys Insight about how standards enable engineers to become more competitive as they differentiate their designs.
Synopsys Innovation Update
Latest News on Products, Technologies, Services and Solutions to Help Drive Differentiation and Innovation
Learn about some of the recent innovations Synopsys is providing its customers to help accelerate the development of better products sooner and more cost effectively.
Standards Column
Peace, Love and Interoperability in the EDA Standards World!
For years, competing standards frequently restrained the standards community as they waged war. Learn about the unity and collaboration that has taken place over the past few years and how this has enabled both users and vendors to get the best from their designs.
Global SNUG Program
Tap into SNUG 2012 – Your Global Design Community Focused on Innovation
The annual SNUG program delivers insightful keynotes, practical "how to" technical information and networking opportunities to more than 9,000 designers around the world. Attend an upcoming SNUG in your region or learn how you can access this content rich program via our website.
Special Announcement
Calling all Automotive Electronics Designers – Check out Synopsys' NEW Automotive Technical Bulletin
The electronic components in today's automobiles have grown from 5% to 40% over the last three decades. Learn about the new Automotive Technical Bulletin, designed to help you keep up with the latest automotive technology news.