Insight Home | Previous Article | Next Article
Issue 4, 2012
Accelerating SoC Verification
Synopsys' Solution for SoC Verification Designers
As today's chips become more complex, SoC designers are looking to advanced technologies to help them address the increasing performance, capacity, and debug challenges. In this video interview, George Zafiropoulos, Vice President of Verification Marketing, Synopsys, and Michael Sanie, Director of Verification Product Marketing, Synopsys, discuss Synopsys' solution for SoC designers as well as Synopsys' verification strategy with the recent SpringSoft and EVE acquisitions.
Verification White Papers
About the Speakers
George Zafiropoulos brings more than 25 years of EDA marketing and technical management expertise to his role as vice president, solutions marketing, at Synopsys. In this role, he is responsible for Synopsys' key vertical markets, low power and system-to-silicon verification. Prior to joining Synopsys, Zafiropoulos worked as vice president of verification marketing at Cadence Design Systems. Before that, he was vice president of marketing for Quickturn Design Systems, which was acquired by Cadence in 1998. Zafiropoulos also held a senior management position with Daisy Systems, an EDA hardware and software provider. Zafiropoulos holds a bachelor's degree in management from Pepperdine University, Malibu, California.
Michael Sanie is director of verification product marketing at Synopsys. He has more than 20 years of experience in semiconductor design and design software. Prior to Synopsys, Michael held executive and senior marketing positions at Calypto, Cadence, and Numerical Technologies. Michael started his career as a design engineer at VLSI Technology and holds four patents in design software. He holds BSCEE and MSEE degrees from Purdue University and an MBA from Santa Clara University.