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Issue 2, 2012
Synopsys Innovation Update
Latest News on Product, Technologies, Services and Solutions to Help Drive Differentiation and Innovation
Synopsys offers a wide range of products, solutions, and services to the global electronics market for designing and manufacturing semiconductors. In this article, we provide a brief overview of key additions to some of our existing solutions as well as showcase recent innovations to Synopsys' ever-growing lineup of software, IP and services.
Figure 1: The Synopsys product portfolio spans from Systems to SoC to Silicon
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The HAPS family of products provides an integrated and scalable hardware-software solution leveraged by design and verification teams to improve their ASIC design schedules and avoid costly device re-spins. The combination of HAPS hardware and Identify® software enables greater visibility of internal signals in FPGA-based prototypes to accelerate SoC design debug even further. The new HAPS Deep Trace Debug provides 100x more storage capacity for signal traces, freeing up FPGA memory resources to better accommodate complex SoC prototyping projects.
Learn more about HAPS.
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As part of Synopsys’ FPGA Design Solution, the Synplify Premier product delivers a high-quality, high-performance and easy-to-use implementation and debug environment for FPGA designers. Customers benefit by achieving the industry’s best Quality of Results (QoR), area optimization for cost and power reduction, high reliability features for safety-critical applications and hierarchical design methods for faster FPGA development. The latest version F-2012.03-SP1 includes software improvements and enhancements for the entire FPGA synthesis product family, including Synplify, Synplify Pro and Synplify Premier. Synopsys customers can log in to SolvNet to read the release notes and to download the latest version.
Learn more about Synplify Premier.
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|Hybrid Prototyping Solution|
Synopsys’ Hybrid Prototyping solution is the industry’s first complete hybrid prototyping solution for SoC designs. This out-of-the-box solution seamlessly integrates Virtualizer™ Virtual Prototyping and HAPS® FPGA-based prototyping to speed software development, hardware/software integration and system validation.
Read the full article about Hybrid Prototyping in this issue of Insight.
Learn more about Hybrid Prototyping Solution.
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Magellan is a hybrid RTL formal verification product that allows engineers to find deep, corner-case bugs quickly, resulting in shortened functional verification cycles, reduced verification costs, and high-quality designs. By enabling reuse of assertions between dynamic and formal verification environments, Magellan also helps to increase engineers’ verification productivity. Log in to your SolvNet account to download the latest version of Magellan.
Learn more about Magellan.
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|DesignWare IP||DesignWare® ARC™ 700 Processor Core|
The DesignWare ARC 700 Family of 32-bit RISC processor cores are ideal for deeply embedded applications and DSP tasks where high-performance and low-power consumption are required. With the release of the latest version 4.10 SP1, customers will find an increased peak frequency of up to 1.2GHz in 28HPM when using the Synopsys Reference Design Flow. The ARC 700 Family offers a broad range of processor solutions that enable system-on-chip (SoC) designers to create a wide range of embedded microprocessors that are tuned and optimized for their specific target applications.
Learn more about DesignWare ARC 700 Processor Core Family.
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|DesignWare® SoundWave Audio Subsystem|
The DesignWare® SoundWave Audio Subsystem provides designers with a complete, pre-verified audio subsystem consisting of hardware, software and prototyping for integration into system-on-chip (SoC) designs. Supporting 2.1 to 7.1 audio streams at 24-bit precision, the SoundWave Audio Subsystem meets the demanding performance requirements of today’s audio applications such as digital TVs, set-top boxes, Blu-ray™ Disc, speaker bars, media players, portable audio and tablets.
Read the full article about SoundWave Audio Subsystem in this issue of Insight.
Learn more about SoundWave Audio Subsystem.
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IC Validator is a signoff DRC/LVS physical verification tool that has been architected and proven for advanced nodes down to 20nm and below. It delivers excellent scalability for efficient utilization of available hardware, superior ease-of-use for the physical designer, support for double patterning for advanced nodes, and full support for finFET devices. IC Validator is also integrated into IC Compiler through award-winning In-Design technology. In-Design uses signoff-quality runsets to provide timing-aware metal fill during implementation, as well as fast detection and automatic repair of DRC errors.
Learn more about IC Validator.
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Yield Explorer brings yield relevant data from diverse sources, such as physical design flow, wafer manufacturing, and wafer and chip-level testing, into a single data bank allowing product and test engineering teams to rapidly diagnose yield and performance issues. Version F-2011.12-SP2-8 is now available and can be downloaded through your SolvNet account.
Learn more about Yield Explorer.
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As part of Synopsys’ Optical Design products, CODE V is used for the optimization, analysis, and tolerancing of image-forming optical systems and free-space photonic devices. CODE V version 10.4 offers enhancements to the tool and combines superior engineering capabilities with the control and access of an intuitive user interface. To read the full set of release notes, log in to your SolvNet account.
Learn more about CODE V.
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