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Issue 2, 2012

Technology Update
Delivering Great Audio with an SoC-Ready IP Subsystem

To meet the growing demand for high-quality audio in today's consumer electronic products, System-on-Chip (SoC) design teams must support more audio formats, higher sampling rates and faster processing speeds. Henk Hamoen, Synopsys, explains how a complete, pre-integrated and pre-verified audio IP subsystem consisting of hardware, software and prototyping reduces SoC integration effort, lowers design risk and accelerates time-to-market.

Consumers have come to expect a rich, high-quality audio experience from their devices. Digital TVs, set-top boxes, mobile phones, Blu-ray disc and portable media players are just some examples of products that incorporate advanced audio processing to support the growing amount of audio content available on the internet and other media.

The need for higher processing capacity is due in part to many elements, such as the shift to HD multi-channel audio, higher sampling rates (i.e. 24-bit precision, 192 kHz sample rates), sophisticated audio compression formats, and advanced sound processing, such as virtual surround sound and dynamic volume control. As a result, design teams tasked with implementing high-quality audio functionality into SoCs are faced with significant hardware and software challenges.

To address the substantial computational requirements of high-quality audio, designers are now offloading all of the audio processing from the host processor to a dedicated subsystem. Integrating a dedicated, optimized audio processor within a subsystem helps reduce the power and cost of the overall SoC, as well as deliver a better audio experience for consumers. While design teams can readily source the hardware IP components for audio functions, the actual integration and verification of the complete audio subsystem has become a major undertaking.

Synopsys DesignWare SoundWave audio subsystem

Complete Audio IP Subsystem
A complete, pre-verified and pre-integrated audio subsystem consisting of hardware, software and prototyping enables design teams to substantially reduce the development time and risks associated with implementing audio functionality in a SoC.

"With complete, pre-verified IP subsystems, which include the hardware as well as the software that goes around the IP, designers can solve their design issues at the chip level rather than the individual block level. With the DesignWare SoundWave Audio Subsystem, Synopsys is pioneering new ground in the IP industry that will enable electronics developers to innovate at a much faster rate."
Rich Wawrzyniak, senior market analyst at Semico Research Corporation

Synopsys' DesignWare® SoundWave Audio Subsystem integrates a configurable and optimized hardware architecture, integrated software environment and virtual and FPGA-based prototyping to support early software development and fast system bring up. Figure 1 provides an overview of the DesignWare SoundWave Audio Subsystem.

Synopsys DesignWare SoundWave audio subsystem
Figure 1: Synopsys DesignWare SoundWave Audio Subsystem

Hardware Architecture
The SoundWave Audio Subsystem's hardware architecture (Figure 2) supports 2.0 to 7.1 audio streams at 24-bit precision to meet the latest audio standards. It includes the choice of a configurable single or dual-core power-efficient ARC™ 32-bit audio processor. Configurability is a key feature of the SoundWave Audio Subsystem; designers can, for example, configure cache sizes, up to two digital S/PDIF input and output interfaces, as well as determine a complete range of parameters for the I²S interfaces. The I²S interfaces also provide the connectivity to the integrated analog-to-digital and digital-to-analog codecs. Synopsys' DesignWare HDMI digital controllers can be directly connected to the S/PDIF interfaces, creating a high-bandwidth, on-chip connection for streaming of Dolby and DTS-1 audio formats.

DesignWare SoundWave Audio Subsystem hardware architecture
Figure 2: DesignWare SoundWave Audio Subsystem hardware architecture

The SoundWave Audio Subsystem supports autonomous streaming to and from its digital and analog peripherals, which helps to significantly simplify the software on the host processor.

Integrated Software
As more audio features and functions are implemented into a SoC, the amount of software needed to support those features also grows. Developing and integrating software has become the bottleneck for many SoC projects today. To address the software complexity, Synopsys' DesignWare SoundWave Audio Subsystem consists of a ready-to-use software environment and media streaming framework. These enable software designers to combine all of the functions they need to create innovative audio solutions for applications such as media players, Blu-ray Disc players, set-top boxes and digital TVs (Figure 3).

DesignWare SoundWave Audio Subsystem software environment
Figure 3: DesignWare SoundWave Audio Subsystem software environment

Built on top of the Media Streaming Framework, the GStreamer plug-in component runs on the host processor and enables the application software designers to immediately use all of the audio functions on the SoundWave Audio Subsystem without having to create and integrate additional code. The dedicated software includes a comprehensive library of certified audio decoding, encoding and post-processing software components, including those from Dolby Laboratories, DTS and SRS Labs.

Virtual and FPGA-Based Prototypes
Virtual and FPGA-based prototypes enable designers to accelerate software development, integrate the audio subsystem software stack on the host processor and validate the full system.

A Virtualizer™ virtual prototype of the SoundWave Audio Subsystem enables design teams to integrate the audio software stack with the application software months before silicon becomes available, in fact, even before the hardware design has started. The code that the software team develops on the virtual prototype can be run on the physical hardware without manual modification.

Design teams can create a physical prototype of their hardware design using Synopsys' HAPS® FPGA-based prototyping solution. The SoundWave Audio Subsystem includes the required views to create an FPGA implementation of the design. The FPGA prototype offers a scalable, high-capacity platform for rapid hardware-software integration and full system validation.

The SoundWave Audio Subsystem is the industry's first complete audio IP subsystem, consisting of hardware, software and prototyping. By integrating multiple blocks together with software as a pre-verified audio subsystem, Synopsys enables designers to significantly reduce SoC design and integration effort, lower risk and accelerate time-to-market. Putting aside the amount of effort it takes to build a complete software environment, companies can typically take weeks or months to integrate audio subsystem solutions, which can lack hardware functions such as digital or analog interfaces. With the SoundWave Audio Subsystem, design teams can integrate and configure advanced audio processing into an SoC in just a few hours.

The SoundWave Audio Subsystem includes all the required hardware components, including single or dual-core 32-bit ARC audio processors, analog audio codecs and digital peripherals (I²S, S/PDIF). The software stack includes audio decoders and encoders plus post-processing software, as well as a pre-integrated Media Streaming Framework (MSF) that enables users to easily create any audio use-case. A GStreamer plug-in provides seamless integration into the host application. The virtual and FPGA-based prototypes accelerate software development and validation of the full system. An easy-to-use configuration tool enables designers to configure a complete subsystem in hours instead of weeks if done manually. For more information, please visit

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About the Author
Henk Hamoen is senior product marketing manager for the DesignWare® SoundWave Audio Subsystem and ARC Audio IP product lines at Synopsys. Henk has over 15 years of experience in the semiconductor industry and has held various marketing and program management positions at Virage Logic, NXP Semiconductors and Philips. Henk holds a B.Sc. EE from Saxion University of Applied Sciences in The Netherlands.

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