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Issue 3, 2011

Technology Update
Signoff-Driven ECO Guidance for Faster Timing Closure

ECO Guidance technology is a new enhancement to Synopsys' PrimeTime static timing analysis (STA) solution, which helps design teams to deal more efficiently with timing signoff engineering change orders (ECOs). Bernadette Mortell, senior product marketing manager for the PrimeTime Suite at Synopsys, explains how the new technology works.

As design teams migrate to smaller and smaller process geometries, they face a growing number of design challenges to maintain timing accuracy as new process effects come into play, and to manage design complexity as they integrate more functionality into a single chip. Achieving timing closure for chip signoff is one such challenge.

Static timing analysis tools, such as Synopsys' PrimeTime, provide signoff-quality timing information. PrimeTime reports enable design teams to identify the ECOs required to fix timing violations identified by signoff timing analysis. In the past, designers have created Tcl scripts to make simple netlist changes to move the design to timing closure (Figure 1).

This approach worked well when design teams had just a few signoff violations to fix and only a handful of scenarios for signoff. As the number of scenarios has grown and the practice of design reuse has become more prevalent, creating custom Tcl scripts to manage change orders has become unsustainable.

Figure 1. Script-based signoff-driven timing closure flow
Figure 1: Script-based signoff-driven timing closure flow

Signoff-Driven Timing Closure
The current generation of place and route tools, including IC Compiler, is capable of timing- driven placement, optimization and routing. The timing engines of IC Compiler and PrimeTime are well correlated to produce matching timing results. This raises the question as to why timing violations arise following place and route in the first place. There are several reasons:
  • Often, the design team won't have the complete set of constraints for the signoff-timing scenarios during implementation. During signoff analysis, the timing tools will identify new violations from the newly-created signoff scenarios.
  • As the practice of design reuse grows, the place and route and signoff tools sometimes use different settings and timing constraints. During implementation the design team may over-constrain certain blocks (to operate at higher frequencies than required for the current design) in order to reuse in other chips.
  • Place and route tools typically see a top-level design containing a number of blocks in a budgeted timing context, while the signoff tool sees the full chip as a flat design with the flat-chip timing context. These different contexts are another reason why design teams have to perform final-stage ECO closure.

Figure 2. Timing closure methodology
Figure 2: Timing closure methodology

Whatever the reason for the remaining violations, since timing closure happens at the eleventh hour of the schedule, design teams need to be able to perform fast and efficient final-stage timing closure between place and route and signoff.

Limited Scalability for Scripts
Design teams that develop their own scripts to perform signoff-driven ECO using PrimeTime's basic netlist editing capabilities are finding it increasingly difficult to scale their scripts to cope with large designs and dozens of signoff scenarios.

Design teams can write scripts to deal with a few hundred timing closure violations for functional signoff and test scenarios for designs up to about 5 million instances. Scripts can add buffers or upsize cells to achieve timing closure. Sophisticated scripts can even check if a fix suggested in one scenario will create new violations in the other as long as the scenarios and their associated timing information can all be held in active memory during the ECO process. If a few of the suggested fixes create new violations, the problem can still be easily managed in the final semi-manual ECO fixing phase. This is the point at the end of the design process when design teams want to strictly control the final changes before tapeout and will often make the final ECOs by hand.

However, today's designs of 20-50m instances increase the scale of the ECO timing closure problem by almost exponential proportions. As the number of signoff scenarios have increased anywhere between 20 and 100, there is the danger of a ping-pong effect, where fixing one set of violations creates hundreds of new violations. This lack of predictability is impossible to account for in the project schedule. Additional iterations thorough place and route, extraction and timing would be required. This is a significant drain on personnel and computing at a time when resources are stretched to the limit.

Figure 3: Estimate of runtimes and machine resources required to complete ECOs as chip size increases and number of scenarios grows
* Assuming ~200 timing violations per 1 million instances in the design
** Assuming all scenarios need to be available in active memory on a single large machine

Figure 3: Estimate of runtimes and machine resources required to complete ECOs as chip size increases and number of scenarios grows

PrimeTime Signoff-Driven ECO Guidance
PrimeTime's new ECO Guidance technology addresses two of the problems that the use of scripts cannot – scalability and predictability.

The new technology provides a scalable approach to implementing ECOs across a growing number of scenarios without an unmanageable increase in runtime or memory usage. ECO Guidance creates a timing violation view across all scenarios, which is used to analyze any proposed changes in one scenario for their impact on the other scenarios. Sub-processes representing the individual scenarios validate the proposed changes using this new composite view of the violations. This eliminates the requirement to maintain the STA runs and reports for all scenarios in active memory in the master process, which is a significant peak memory saving. Additionally, the proposed changes in the local sub-processes are faster than having to transfer information to the master process to validate the scenarios.

Figure 4: Scalable all-scenario view used by ECO Guidance technology
Figure 4: Scalable all-scenario view used by ECO Guidance technology

Another innovation is calibrated estimation, which can quickly evaluate all the available fixing options for a given timing violation. This new approach estimates the outcomes for all options, without requiring a full timing analysis. It then calibrates the results with the available (accurate) timing data from the "all scenario" timing view. This is significantly faster than full analysis and improves the turnaround time per cell operation. Because calibrated estimation considers all scenarios and evaluates all possible fixing options, it delivers results that are more predictable and achieves better results with fewer changes to the netlist.

Figure 5: Calibrated estimation
Figure 5: Calibrated estimation

Predictable Results
For setup and hold timing violations after IC Compiler implementation, design teams are seeing guidance success rates of 90-95% – even for designs with high placement and routing utilizations. The number of changes that ECO Guidance recommends is kept to a minimum, which avoids creating unnecessary congestion for placement and routing, and contributes to the improved timing closure predictability.

Figure 6: ECO Guidance success rates reported post IC Compiler place and route
Figure 6: ECO Guidance success rates reported post IC Compiler place and route

Design teams are taping out 45-nanometer (nm) and 28nm designs using ECO Guidance technology and seeing runtime improvements of 5-10 times compared with their previous script-based ECO solutions. They are getting results in a single pass which previously took several iterations to achieve. This means they require fewer loops through place and route and extraction to get to timing closure. Quality of results is better too, as ECO Guidance technology fixes violations using fewer buffers, which results in less area.

Optimizing Performance
We have recently enhanced ECO Guidance technology to enable it to run efficiently even when there are fewer processor cores available to run on than the number of timing scenarios. In PrimeTime releases prior to 2011.06, to check if an ECO change was valid across all possible scenarios, all the scenarios needed to be available in active memory. It was necessary to run every scenario on a separate process or core simultaneously to get a good guidance success rate. If fewer processes or cores were used, then the resulting change list was likely to produce invalid fixing recommendations, including some that created new violations in other scenarios.

The new ECO Guidance technology, which uses the "all scenario" view of timing violations, can be run on up to 4 times fewer processes or cores than the number of scenarios, with minimal degradation in the guidance success rates. This is a major benefit to customers who are resource-constrained and can afford to take a little longer to generate the ECO change list while using fewer machines and PrimeTime licenses.

What's Next for ECO Guidance?
Because of the success of the new ECO Guidance technology, we are seeing customer demand for a similar approach to help guide design rule checking (DRC). This extends our support to timing-aware maximum capacitance, maximum transition and maximum fanout ECO guidance generation. We are currently offering this in limited availability in the 2011.06 service pack releases, although we anticipate it being generally available in the 2011.12 release.

As we work with customers on other PrimeTime technologies, such as HyperScale, we are seeing the benefits of closely integrating the two technologies with the aim of reducing the time to timing closure for hierarchical designs.

The Synopsys PrimeTime suite has been the golden signoff STA solution for over 15 years. Over that period, we have focused on delivering highly accurate timing analysis reports for the purpose of timing signoff. PrimeTime provides a single trusted signoff solution for timing, signal integrity, power and variation-aware analysis.

We will continue to respond to emerging design and process challenges by adding new timing analysis features to improve designer productivity and by improving PrimeTime's runtime and capacity performance. ECO Guidance is the latest example of our development effort, which complements other recent enhancements, such as variation-aware advanced on-chip variation (OCV), statistical analysis and multicore capabilities.

More Information
  • Learn more about PrimeTime
  • Webinar: Save Weeks Fixing ECOs with PrimeTime and IC Compiler

About the Author

Bernie Mortell
Bernadette (Bernie) Mortell is senior product marketing manager for the PrimeTime Suite at Synopsys and drives the development and deployment of Timing and Constraint Analysis products. Prior to Synopsys, she was in the applications and marketing team at Compass Design Automation working on Place and Route and Floorplanning tools, and worked for 10 years as a Physical Design Manager on Data Converter, Amplifier and Linear products and DSP Processors at Analog Devices in Ireland.

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