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Issue 3, 2011

Synopsys Innovation Update
Latest News on Product Updates, Technologies, Services and Solutions

Synopsys offers a wide range of products, IP, services, and solutions to the global electronics market for designing and manufacturing semiconductors. In this section of Insight, we provide a brief overview of key additions to some of our existing solutions as well as showcase recent innovations to Synopsys' ever-growing lineup of software, IP and services.

Figure 1. The Synopsys product portfolio spans from Systems to SoC to Silicon
Figure 1: The Synopsys product portfolio spans from Systems to SoC to Silicon

System Design

Virtualizer is Synopsys' latest tool set and an integral part of the company's comprehensive solution for early software development, hardware-software integration, and system validation. Virtualizer addresses the increasing development challenges associated with software-rich semiconductor and electronic products by enabling designers to accelerate both the development and deployment of virtual prototypes.
Learn more about Virtualizer and see the Virtualizer article in this issue of Insight.

Platform Architect
For early definition and performance analysis of multicore system architectures, Platform Architect can capture hardware and software performances in the concept phase for robust performance measurement and trade-off analysis. Utilizing this tool not only reduces design risks, but it also helps ensure cost-effective and successful products.
Learn more about Platform Architect.

Processor Designer
Eliminate months of custom processor development effort with Synopsys' Processor Designer. Processor Designer is used to develop a wide-range of processor architectures including architectures with DSP-specific and RISC-specific features.
Learn more about Processor Designer.


CustomExplorer UltraCustomExplorer Ultra
CustomExplorer™ Ultra provides a comprehensive regression and analysis environment to increase verification productivity and streamline the verification process for analog and mixed-signal designs. The combination of CustomExplorer Ultra and Synopsys' CustomSim™/ VCS® mixed-signal verification solution provides design teams with a high-performance, productive mixed-signal simulation and regression management environment for complex SoC verification.
Learn more about CustomExplorer Ultra.

DesignWare IP

AEON Embedded Non-Volatile MemoryAEON Embedded Non-Volatile Memory
Synopsys' DesignWare® AEON® embedded non-volatile memory (NVM) IP offers a comprehensive family of multiple time programmable (MTP) and few time programmable (FTP) solutions ideal for a broad range of standard CMOS processes as well as wireless, RFID, and analog and mixed-signal SoC designs.
Learn more about the DesignWare AEON NVM.

ARC Processor Cores
The DesignWare ARC™ 750D host processor, which runs at 1.1 GHz and delivers 1800 DMIPs in an industry standard 40-nanometer (nm) process, is an ideal choice for designers requiring a high-performance, low-power, and cost-effective microprocessor to drive Android-based applications.
Learn more about the DesignWare ARC Processor Cores.


PrimeTime SuitePrimeTime Suite
PrimeTime 2011.06 is now available. PrimeTime is 20% faster than the previous version and includes a next-generation multi-scenario ECO guidance technology that can shave weeks off ECO fixing turnaround time. In addition, a single PrimeTime license will now support up to 16 cores on a single machine.
Learn more about PrimeTime Suite.

Code V
Available from Synopsys as part of its acquisition of Optical Research Associates (ORA), CODE V version 10.3 enhances aspheric lens system design. Delivering new design and analysis capabilities, optical designers can easily take advantage of the distinctive image quality and cost benefits that aspheres provide. View full release notes for CODE V 10.3 through your SolvNet account.
Learn more about CODE V.

DC Explorer
As one of the newest additions to the Galaxy™ Platform, DC Explorer accelerates the production of high-quality design data. DC Explorer creates a better starting point for RTL synthesis by identifying potential design issues in need of improvement prior to implementation. Exploring and revamping early designs leads to a highly convergent implementation flow.
Learn more about DC Explorer.


Proteus LRCProteus LRC
Announced at SPIE Advanced Lithography 2011, Proteus LRC (lithography rule check) provides IC manufacturers with a highly accurate lithographic verification solution at the lowest cost of ownership. The embedded Sentaurus Lithography rigorous simulator provides resist profile and topography simulations for the highest available accuracy. Proteus LRC has been integrated into Synopsys' Proteus Pipeline Technology, providing concurrent processing for all stages of the mask synthesis and fracture flow in a highly scalable environment to hundreds, even thousands, of CPUs. This enables control of turnaround time while maintaining the lowest cost of ownership through the use of standard x86 processor cores.
Learn more about Proteus LRC.

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