Contributed Articles 

Product How-to: Fully utilize TSMC’s 28HPC Process
Apr 13, 2015

Securing 4K Content and Beyond Over HDMI
Apr 09, 2015

A Better Method for Early and Accurate Power Estimation
Apr 03, 2015

Fast Followers and the Value of Virtual Prototyping
Mar 26, 2015

Helping Tokyo Olympics Tech Drive Succeed
Mar 25, 2015

Demonstrating ASIC IP Performance and Quality Demands an FPGA-Neutral Design Flow
Mar 16, 2015

Extending UPF for Use in System-Level Design
Mar 12, 2015

Time for Multimedia SoCs to Get Their Analog Video/Audio Signals Right
Mar 04, 2015

Getting the Most Out of IP based FPGA Design with Synplify
Feb 27, 2015

Better Software. Faster! A Virtual Prototyping Case Study From Kyocera Document Solutions
Feb 26, 2015

Optimized IP Fosters Energy-Efficient IoT Chip Design
Feb 25, 2015

Speeding Up Simulation Using Native System Verilog Transactors
Feb 03, 2015

Demos ASIC IP Performance and Quality Needed FPGA Design Flow Neutral
Feb 01, 2015

Mixed-signal Verification of Advanced SoCs using VCS AMS
Jan 30, 2015

Today’s Designs Require a Verification Continuum
Jan 28, 2015

USB 3.1 Links Pose Challenges
Jan 22, 2015

Image Sensor and Display Enhancements Drive Low-Cost Smartphone Growth
Jan 15, 2015

Automatic ASIC-to-FPGA Conversion
Jan 15, 2015

Turning On the Virtual Prototyping Hose
Dec 18, 2014

Overcoming Complex CDC Violations with a Concurrent Block and SoC-Level Verification Flow
Dec 08, 2014

The Road to Intelligent Vehicles Is Paved With Standards
Dec 05, 2014

IP Power Models Enable Energy-Aware System-Level Design
Dec 04, 2014

Using Formal Techniques to Help Tackle SoC Verification Challenges
Dec 01, 2014

In FPGA Design Timing Is Everything, Says Synopsys
Dec 01, 2014