Bridging the Gap in Mixed-Signal Debug: Introducing Synopsys' NEW Verdi Advanced AMS Debug Solution
In this webinar, we will demonstrate how Synopsys' new Verdi Advanced AMS debug solution, based on the market-leading Verdi SoC debug platform, delivers groundbreaking co-simulation debug for both analog and digital engineers, as well as system integrators.
Archie Feng, Corporate Applications Engineer, Verification Group, Synopsys; Vaishnav Gorur, Product Marketing Manager, Verification Group, Synopsys
Mar 15, 2016

20X Power Analysis Performance Improvement with Synopsys Verdi Technologies
Discover how Synopsys' Verdi technologies, Siloti Correlation and Siloti What-If Replay Simulation, can enable up to 20X performance improvement for power analysis – from weeks to hours. These technologies enable the use of RTL simulation results to generate gate-level simulation data without the need to bring up the gate-level environment, thus enabling power analysis at early stages of the design cycle. Also included is parallel run technology to enhance performance up to 60X compared to the original flow.
Rich Chang, Product Marketing Manager, Debug, Synopsys
Sep 16, 2015

Automate Low Power Verification and Implementation Flow with VC Apps
UPF imported into Verdi's database provides valuable information to understand relationships between logic designs to power its intent. Learn how VC Apps APIs allows users to check if the design meets the requirements of low power design rules, and helps automate the implementation of low power design structure.
Rich Chang, Product Marketing Manager, Debug, Synopsys; Paul Huang, Corporate Application Engineer (CAE), Synopsys
Jan 28, 2015