The Synopsys University Program announces the 2015 student design contest featuring Synopsys Custom Design tools. This contest gives students the opportunity to showcase their talent in electronic design. Project designs will be judged by a committee of Synopsys technical staff based on the functionality and efficiency of the design, and on the team’s productivity. Teams selected to compete in the contest will receive a free 3-day training workshop hosted by Synopsys and the chance to win a cash prize.
- Teams will create a complete schematic and DRC/LVS clean layout of a design according to contest specifications using only Synopsys analog mixed-signal tools.
- Teams will be required to use the Synopsys 32/28nm Interoperable Process Design Kit.
- All designs submitted must be original work - designed and drawn by the student teams for this contest. Designs may not have been previously used or directly copied from other sources. This will result in immediate team disqualification.
- Project submissions will be evaluated by the contest committee members and judged based on the following criteria:
- Functionality demonstrated through HSPICE simulations
- Optimal area of layout that is DRC/LVS clean
- Effective use of design productivity features available with the tool flow
- Results that demonstrate close matching of given design specifications through pre-layout and post-layout HSPICE simulations
All judging decisions made by the contest committee will be final.
- First place – 30,000 INR
- Second place – 10,000 INR
- Maximum of one team, made up of two students, per university/educational institute in India may be nominated.
- Only senior-year Bachelor engineering students or Masters engineering students are eligible.
- The affiliated university/educational institute does not need to be an existing Synopsys University Program customer.
- Both team members must demonstrate working knowledge of the following technical skills:
- Analog integrated circuit features, design and analysis methods of basic analog circuits
- Principles of analog circuit techniques, variants, improvement methods of parameters, research of structures, analysis of different basic analog IC parameters
- Differential and operational amplifiers, switched capacitor circuits, oscillators, phase looked loops, data converters, secondary power sources, etc.
- Teams must know how to use the following or equivalent tools:
- Galaxy Custom Designer, HSPICE, FineSim, CustomExplorer Ultra IC Validator, StarRC
How to Nominate a Team:
- Teams can only be nominated by a university professor or department head that will sponsor and support the team during the contest.
- Nominations are no longer being accepted.
- The contest is limited to 50 teams. Once all nominations are submitted and reviewed, teams will be notified of their status by May 29, 2015.
|Call for Nominations Open||May 6, 2015|
|Call for Nominations Closed||May 22, 2015|
|Selected Teams Notified ||May 29, 2015|
|Design Briefing & Tools/Methodology Training in Hyderabad*||July 1-3, 2015|
|Design Briefing & Tools/Methodology Training in Noida*||July 6-8, 2015|
|Schematics and Reports Due||September 25, 2015|
|Finalists Notified ||October 5, 2015|
|Schematics, Layouts, and Reports Due ||November 13, 2015|
|Winners Selected||November 23, 2015|
|Award Ceremony at the Fall University Symposium in Bangalore||December 2015|
* All teams are required to attend one training workshop. Contact firstname.lastname@example.org for exact training facility addresses.