Vazgen Shavarsh Melikyan Bio 

List of Scientific Publications 
Professor Vazgen Melikyan Vazgen Shavarsh Melikyan
Doctor of Science, Professor

Bio

Professional experience

Research Interests

Implemented Projects

Supervision

Grants

Scientific Publications

Selected Methodical publications

Conference Participation

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(Titles are translated into English)
  1. Melikyan V.Sh., Abramyan K.G., Janpoladyan B.L., Abramyan A.K. Creation and Introduction to Exploitation on the basis of Information Computer Center, Latvian Republic Organization of Civil Aviation, “Calculation and accounting”// YPI report, No. 81041905, Yerevan, 1981.-P. 77 (in Russian)
  2. Melikyan V.Sh., Abramyan K.G., Janpoladyan B.L., Abramyan A.K. Creation and Introduction to Exploitation on the basis of Information Computer Center, Latvian Republic Organization of Civil Aviation, “Calculation and accounting”// YPI report, No. 81041906, Yerevan, 1981.-P. 105 (in Russian)
  3. Melikyan V.Sh., Arkhangelskiy A.Y., Karmazinskiy A.N., Petrov G.V. Basic Educational CAD of University // Report of MIFI, No. 01822000176, Moscow, 1982.-P. 105 (in Russian)
  4. Melikyan V.Sh., Arkhangelskiy A.Y., Arkhangelskaya I.T., Levshin N.G., Sergienko B.Yu. Software development of simulating analog-digital converters of information// Report of MIFI, No. 01824034446, Moscow, 1983.-P. 196  (in Russian)
  5. Melikyan V.Sh., Arkhangelskiy A.Y., Volkov Yu.A., Abramov V.F., Mishin A.A., Levshin N.G. Development of high-speed operational amplifiers, development of mathematical and software provision of CAD of analog-digital microassembly// Report of MIFI, No. 01824021405, Moscow, 1983.-P. 287 (in Russian)
  6. Melikyan V.Sh., Arkhangelskiy A.Y. Functionality models of logic cells in the program of mixed-mode logic-circuit simulation// Theses of reports of All-Union Scientific-Technical Conference of “Design Automation of Computers and Systems”, Yerevan, 1983.-P. 80-82 (in Russian)
  7. Melikyan V.Sh., Arkhangelskiy A.Y. Lavrenov O.E., Rojukalns P.P., Svettsov S.V., Fedorkov B.G. A program of mixed-mode simulation of analog-digital VLSI// Theses of reports of All-Union Conference of “Methods and microelectronic means of digital conversion and signal processing”, Riga, 1983.-P. 231-236 (in Russian)
  8. Melikyan V.Sh. Logic-circuit simulation of analog-digital nodes of radio metering devices// Proceedings of 9th All-Union Scientific-Technical Conference of “Radio metering”, Kaunas, 1983.-P.177-180 (in Russian)
  9. Melikyan V.Sh. Description of discrete systems on ELAIS-L language // Theses of reports of 4th All-Union Seminar “Simulation of discrete control and calculating systems”, Sverdlovsk, 1984.-P. 64-66 (in Russian)
  10. Melikyan V.Sh., Arkhangelskiy A.Y., Levshin N.G. Principles of designing a system of mixed-mode simulation of electronic circuits // Seminar materials of “Design Automation in radioelectronics and electrical engineering”,   Moscow, 1984.-P. 91-93 (in Russian)
  11. Melikyan V.Sh. Mixed-mode simulation of analog-digital VLSI // Dissertation for scientific degree of PhD, MIFI, Moscow, 1984.-P. 233 (in Russian)
  12. Melikyan V.Sh., Janpoladyan B.L. Dialogue Teaching System //Interuniversity proceedings of automation, computer engineering and electronics “Transmission and Information Processing”, Yerevan, YPI pub.,¬1984.-P. 9-12 (in Russian)
  13. Melikyan V.Sh., Arkhangelskiy A.Y. Mixed-mode circuit and logic simulation of analog digital circuits // Electronic simulation, Vol. 6, N5, Kiev, Ukraine, 1984.-P. 35-39  (in Russian)
  14. Melikyan V.Sh., Avetikova E.G. Development of specialized control-measuring system for control and screening a series of resistor variables on the basis of microcomputers // YPI report, No. 01850022861, Yerevan, 1985 (in Russian)
  15. Melikyan V.Sh., Arkhangelskiy A.Y. A program of mixed-mode analysis of analog-digital circuits // Proceedings of MIFI “Electrical engineering and devices for experimental physics”, Moscow, 1985.-P.134-138 (in Russian)
  16. Melikyan V.Sh., Arkhangelskiy A.Y. Macromodels on switched capacitors elements // Radioelectronics. Vol. 29, No. 6, 1986.-P. 86-87 (in Russian)
  17. Melikyan V.Sh., Demirkhanyan A.M., Avetikova E.G., Manukyan G.G. Modification of program of logic simulation and union of phases of logic, circuit and layout design on database // YPI report, No. 01860055887, Yerevan, 1987.-P. 85 (in Russian)
  18. Melikyan V.Sh., Demirkhanyan A.M., Avetikova E.G., Manukyan G.G. Development of a program of logic simulation for consideration of parasitic effects of topological realization of VLSI // YPI report, No. 01880047950, Yerevan, 1988.-P. 57 (in Russian)
  19. Melikyan V.Sh., Demirkhanyan A.M., Avetikova E.G. Development of VLSI logic simulation program with consideration of external affects // YPI report, No. 01880047948, Yerevan, 1988.-P.46 (in Russian)
  20. Melikyan V.Sh., Hovasapyan N.O., Manukyan G.G. Definition of noise immunity of digital VLSI // Interuniversity proceedings of YPI “Technical means and mathematical provision of computing systems”, Yerevan, 1988.-P. 60-62 (in Russian)
  21. Melikyan V.Sh., Ovasapyan N.O., Petrukhin V.P. United system of logic simulation and layout design of VLSI // Automation design in electronics, “Technics”, Vol. 40, Kiev, 1989.-P. 61-64 (in Russian)
  22. Melikyan V.Sh., Kusheryan E.A. A language of describing digital circuits // Proceedings of Moscow Aviation Institute, Moscow, 1989.-P.17-20 (in Russian)
  23. Melikyan V.Sh., Simonyan A.Sh. Consideration of external affects in the program of logic analysis // Interuniversity proceedings of YPI “Technical means and mathematical provision of computing systems”, Yerevan, 1990.-P. 61-64 (in Russian)
  24. Melikyan V., Mnatsakanian V., Ziad B., Hayrapetyan T. VLSI adaptive simulation// Proceedings of the 1st International conference on Application of Critical Techno¬lo¬gies for the Needs of So¬ciety, Yerevan, 1995.-P. 135 (in Russian)
  25. Melikyan V.Sh., Buakel Z.Kh. Logic model of digital cell for small signals// SEUA. Armenian Scientific-Research Institute of Information, 20.11.95, N 6, Yerevan,1996 (in Russian)
  26. Melikyan V.Sh., Soghomonyan S.Kh., Rahanyan R.R., Simonyan A.Sh. A simulation system of radioelectronic devices and calculation of model parameters// SEUA report 93-806, Yerevan, 1996.-P.45 (in Armenian)
  27. Melikyan V.Sh, Muradyan M.A., Muradyan M.A., Dashtoyan R.V., Gasparyan E.G. An Elaboration of a Universal, PC Programmable, Portable Device with ITS own Microcomputer for Analyzing Random Signals// Proceedings of the Trans Black Sea Region Symposium on Applied  Electromag¬netism, Epirus-Hellas, Athens, 1996. -P.BISY 12 (in English)
  28. Melikyan V.Sh. Structural and Eventual Decomposition of Large Electronic Schemes// Proceedings of the Trans Black Sea Region Symposium on Applied  Electromag¬netism, Epirus-Hellas, Athens, 1996.-P. MMWS 7 (in English)
  29. Melikyan V.Sh, Bagdasaryan H.V., Nshanyan M.A., Uzunoglu N.K. Computer Modeling of Fiber-optic Cîmmunication Systems// Proceedings of the Trans Black Sea Region Symposium on Applied  Electromag¬netism, Epirus-Hellas, Athens, 1996.-P. OPSY 9 (in English)
  30. Melikyan V.Sh., Mnatsakanyan V.A., Ziad B.Kh. Universal adaptive system of parametrical identification of models of electronic components // Proceedings of international scientific-technical conference “Problems of physical and biomedical electronics”, Kiev, 1996.-P. 68-72 (in Russian)
  31. Melikyan V.Sh., Muradyan M.A. Software of portative, universal, intellectual, pre-programmable electrocardiograph // Proceedings of international scientific-technical conference ““Problems of physical and biomedical electronics”, Kiev, 1996.-P. 73-74 (in Russian)
  32. Melikyan V.Sh., Nazinyan S.M. Optimization algorithm of digital paths delays // Proceedings of “Computer Science and Information technologies” International Conference, Yerevan, 1997.-P. 322-325 (in Armenian)
  33. Melikyan V.Sh., Harutyunyan A.A. Consideration Algorithm of External Influence’s Affect on Digital Circuits Functioning// Proceedings of “Computer Science and Infor¬mation technologies” International Conference, Yerevan, 1997.-P. 330-333 (in Armenian)
  34. Melikyan V.Sh., Avakyan A.S., Amirkhanyan K.G., Manucharyan D.V. Logic simulation of digital circuits on the basis of fuzzy logic//SEUA.- Armenian Scientific-Research Institute of Information, 12.11.96, N 31, Yerevan,  1997 (in Russian)
  35. Melikyan V.Sh., Pivazyan T.G. A software complex of parametrical optimization of models of technical objects // SEUA. Armenian Scientific-Research Institute of Information,  11.04.97, N 88, Yerevan, 1997 (in Russian)
  36. Melikyan V.Sh., Virabyan L.G., Khoetkhem A.A. Event-trigger decomposition in case of mixed-mode simulation of VLSI // SEUA. Armenian Scientific-Research Institute of Information, 10.06.97, N 140, Yerevan, 1997 (in Russian)
  37. Melikyan V.Sh., Virabyan L.G., Oganes P.Sh. Structural decomposition in case of mixed-mode simulation of VLSI // SEUA. Armenian Scientific-Research Institute of Information, 10.06.97, N 141, Yerevan, 1997 (in Russian)
  38. Melikyan V.Sh., Vatyan A.O. Interconnections model delays for the logic analysis of TTL circuits // SUAB, Vol. 1, Computer Engineering, Moscow, 1997.-P. 189-198 (in Russian)
  39. Melikyan V.Sh., Vatyan A.O., Simonyan A.Sh. Delay models of digital VLSI Interconnects // RAs National Academy of Science and SEUA. Vol. 3, N 3, Yerevan, 1997.-P. 201-205(in Armenian)
  40. Melikyan V.Sh., Vatyan A.O. Interconnections model delays for the logic analysis of ECL circuits //SUAB, Vol. 2, Computer Engineering, Moscow, 1997.-P. 187-194 (in Russian)
  41. Melikyan V.Sh., Avakyan A.S. Simulation of digital circuits based on the theory of fuzzy logic// RAs National Academy of Science and SEUA. Vol. 50, N 2, Yerevan, 1997.-P.126-130 (in Armenian)
  42. Melikyan V.Sh., Hakobyan S.M. Cost reduction of digital circuits by means of optimizing element delays // SEUA. Armenian Scientific-Research Institute of Information, 12.05.97, N 120, Yerevan, 1997 (in Russian)
  43. Melikyan V.Sh., Vatyan A.O. Interconnections model delays for the logic analysis of I2L circuits // SUAB, Vol. 3, Computer Engineering, Moscow, 1997.-P. 163-166 (in Russian)
  44. Melikyan V.Sh., Mnatsakanian V.A., Uzunoglu N.K. Optimization of SPICE System LEVEL3 MOSFET Transistor Models based on DC Measurements// Microelectronics Journal 29, Elsevier Science, Great Britain, 1998.-P.151-156 (in English)
  45. Melikyan V.Sh. Optimization of timing parameters of digital circuits elements // Elektronika I svyaz, Vol.4, No 2, Kiev,1998.-P. 249-253 (in Russian)
  46. Melikyan V.Sh. A universal program for identification of parameters of electronic components models // Elektronika I svyaz, Vol.4, No 2, Kiev, 1998.-P.245-248 (in Russian)
  47. Melikyan V.Sh. Macromodel of logic gate-chains // Simulation, optimization, control, SEUA, Yerevan, RA,, Vol. 2, Yerevan, 1998.-P.52-57 (in Armenian)
  48. Melikyan V.Sh., Arakelyan A.A., Aghgashyan R.V., Barseghyan A.A. Adaptive algorithm of 1D optimization methods // Proceedings of annual scientific conference of SEUA, Yerevan, 1998.-P. 208-209 (in Russian)
  49. Melikyan V.Sh., Kulakhszyan A.P., Khzarjyan A.A., Kyureghyan A.P. Logic macromodels of typical fragments of digital circuits // Proceedings of annual scientific conference of SEUA, Yerevan, 1998.-P. 210 (in Russian)
  50. Melikyan V.Sh., Soghomonyan B.S., Melikyan A.V., Petrosyan A.F. Logic simulation of digital VLSI with consideration of environment temperature // Proceedings of annual scientific conference of SEUA, Yerevan, 1998.-P. 211 (in Russian)
  51. Melikyan V.Sh., Vatyan A.O., Grigoryan T.G., Abazyan M.A. Symbol-topological simulation method of electronic circuits // Proceedings of annual scientific conference of SEUA, Yerevan, 1998.-P. 211-212 (in Russian)
  52. Melikyan V.Sh. Logic simulation algorithm of digital circuits with consideration of environment temperature //Proceedings of 3rd International scientific-technical conference “Innovative Information Technologies and Systems”, Penza, 1998.-P. 158-160 (in Russian)
  53. Melikyan V.Sh. Logic simulation of digital circuits with consideration of destabilizing factors // Proceedings of the 5th International Conferen¬ce on The Experience of Designing and Application of CAD Systems in Microelect¬ronics (CADSM’99), Lvov, 1999.-P.142-144 (in Russian)
  54. Melikyan V.Sh., Harutyunyan A.A., Vatyan A.O. Logic model of part of digital circuits with consideration of destabilization factors // Proceedings of the 5th International Conference on The Experience of Designing and Application of CAD Systems in Microelectronics (CADSM’99), Lvov, 1999.-P.145-146 (in Russian)
  55. Melikyan V.Sh. Logic Simulation of Digital Circuits Exposed to Radiation// Facta universitatis, series: Electronics and Energetics, Vol. 12, No. 1, Nis, 1999.-P. 1-16 (in English)
  56. Melikyan V.Sh., Nazinyan S.M. Logic element model with delay dispersion // Proceedings of annual scientific conference of SEUA, Yerevan, 1999.-P.220 (in Russian)
  57. Melikyan V.Sh. Principles of logic simulation of digital circuits with consideration of destabilizing factors // Proceedings of "Computer Science and Infor¬mation Technologies" International Conference, Yerevan, 1999.-389-393 (in Russian)
  58. Melikyan V.Sh., Balagezyan A.R. Key design tools of logic macromodels of digital circuits // Proceedings of "Computer Science and Infor¬mation Technologies" International Conference, Yerevan, 1999.-P. 394-398 (in Russian)
  59. Melikyan V.Sh. Logic block of digital cell model for consideration of destabilizing factors // Elektronica I svyaz, N 8, Vol. 2,  Kiev, 2000.-P. 266-268 (in Russian)
  60. Melikyan V.Sh. Inertance block of models of digital element  for consideration of destabilizing factors // Elektronica I svyaz, N 8, Vol. 2,  Kiev, 2000.-P. 269-271 (in Russian)
  61. Melikyan V.Sh., Nazinyan S.M. Power consumption algorithm of digital ICs// Simulation, optimization, control, SEUA, Yerevan, RA, Vol. 4, Yerevan, 2001.-P. 159-166 (in Armenian)
  62. Melikyan V.Sh. Simulation of logics of digital cell for consideration of destabilizing factors’ affects // Proceedings of "Computer Science and Infor¬mation Technologies" International Conference, Yerevan, 2001.-P. 394-398 (in Russian)
  63. Melikyan V.Sh., Kyureghyan S.G., Mamikonyan B.M., Abgaryan S.V., Balasanyan S.Sh. Design of control systems by flotation process of concentration // Proceedings of international conference “Computer Science and Information Technologies”, Yerevan, 2001.-P.469-470 (in Russian)
  64. Melikyan V.,  Kulakhszyan A., Soghomonyan V. Quantum and averaged state models from the viewpoint of timing// Proceedings of SEUA annual conference.-Vol. 1.-Yerevan, 2002.-P. 291-292 (in Armenian)
  65. Melikyan V., Mkrtchyan K., Soghomonyan V., Kulakhszyan A. Optimization algorithm of digital circuits // Semiconductor microelectronics. Proceedings of 4th National Conference.-Yerevan, 2003.-P. 220-224 (in Armenian)
  66. Melikyan V.Sh., Muradyan V.O. Logic simulation of digital circuits radiation behavior // Proceedings of "Computer Science and Infor¬mation Technologies" International Conference, Yerevan, 2003.-P. 368-372 (in Armenian)
  67. Melikyan V., Soghomonyan V., Mkrtchyan E. Model of digital cells’ states in algorithmic calculation // Interuniversity scientific and methodical proceedings. 6. 51. Yerevan, 2003.-P. 44-54 (in Armenian)
  68. Melikyan V., Kulakhszyan A. Logic models with consideration of leakage delays, quantum and averaged states // Information technologies and management. Vol. 3, Yerevan, 2003.-P. 8-15 (in Armenian)
  69. Melikyan V., Kulakhszyan A. Logic models with averaged states // RAs National Academy of Science and SEUA, Yerevan, RA, Vol. 56, N 3, Yerevan, 2003.-P. 491-499 (in Armenian)
  70. Melikyan V.Sh., Mkrtchyan E.O., Soghomonyan V.S. Models of digital cells with algorithmic calculation of states // RAs National Academy of Science and SEUA. Yerevan, 2003. No. 1.-P. 201-205 (in Russian)
  71. Melikyan V.Sh., Hovhannisyan D.D. Restructuring algorithm of digital circuits // Simulation, optimization, control, SEUA, Yerevan, 2003. Vol. 4.-P. 159-166 (in Russian)
  72. Melikyan V.Sh. The Simulation of Digital Circuits Taking into Account the Destabilizing Factors// Proceedings of the 4th National Conference "Semiconductor Microelectronics",  Tsakhkadzor, 2003.-P. 240-243 (in Armenian)
  73. Melikyan V.Sh., Hovhannisyan D.D. Optimization Techniques for High-Performance Digital Circuits// Proceedings of the 4th National Conference "Semiconductor Microelectronics",  Tsakhkadzor, 2003.-P. 260-263 (in Armenian)
  74. Melikyan V.Sh., Hovhannisyan D.D. Algorithm of digital circuits restructuring // Simulation, optimization, control, SEUA, Yerevan, RA, Vol. 6, No 1, Yerevan, 2003.-P. 39-44 (in Armenian)
  75. Melikyan V.Sh., Sargsyan S.M., Petrosyan D.A. Calculation model of parasitic inductances of inner interconnects of VLSI // Simulation, optimization, control, SEUA, Yerevan, Vol. 1, No. 7, 2004.-P. 59-68 (in Russian)
  76. Melikyan V., Mkrtchyan E., Mkrtchyan K., Hovhannisyan D., Soghomonyan V. Isolation methods of electronic circuits // RAs National Academy of Science and SEUA, Vol. 57, No 1, Yerevan, 2004.-P. 130-137 (in Armenian)
  77. Melikyan V.Sh., Hovhannisyan D.D. Delay minimization algorithm of critical paths of digital circuits // RAs National Academy of Science and SEUA. Vol. 57, No. 2, Yerevan, 2004.-P. 324-330 (in Russian)
  78. Melikyan V., Sargsyan S., Petrosyan D. A macromodel of internal interconnects of ICs // RAs National Academy of Science and SEUA. Vol. 57, No. 3, Yerevan, 2004.-P. 506-516 (in Armenian)
  79. Melikyan V., Sargsyan S. A simulation method of considering parasitic affects of supply buses of ICs // Information Technologies and Management. Vol. 1, Yerevan, 2004.-P. 34-48 (in Armenian)
  80. Melikyan V.Sh. A logic simulation method for reproduction of signal bumps in interconnects // Manual of Engineering Academy of Armenia. Vol. 1, No. 3, Yerevan, 2004.-P. 449-451 (in Russian)
  81. Melikyan V., Shahinyan T., Melikyan H. A digital cell macromodel considering radiation affect // Manual of Engineering Academy of Armenia. Vol. 1. No. 3, Yerevan, 2004.-P. 585-588 (in Armenian)
  82. Melikyan V.Sh. Simulation and optimization of digital circuits with consideration of destabilizing factors // Dissertation for the scientific doctoral degree, SEUA, Yerevan, 2005 (in Russian)
  83. Melikyan V.Sh., Davtyan D.F., Fanyan K.A. Simulation Methodology based on Conditional Extraction and Shortest Path Representation for Electrostatic Discharge (ESD) Analysis in CMOS Technologies// RAs National Academy of Science and SEUA. Vol. 59, No. 1, Yerevan, 2006. -P. 184-190 (in Armenian)
  84. Melikyan V.Sh., Mkrtchyan K.G., Melikyan E.V., Petrosyan T.A., Manukyan G.G. Optimization of critical timing paths of digital ICs with consideration of destabilizing factors //Electronica I svyaz. No.9, Vol. 1, Kiev, 2006. -P. 47-51 (in Russian)
  85. Melikyan V.Sh. Logic simulation and optimization of digital circuits with consideration of destabilizing factors // Proceedings of 7th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, 2006. –P. 48 (in Russian)
  86. Melikyan V.Sh., Kocharyan A.Yu. Compensational comprehensive configuration of MOS transistor // Proceedings of 7th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, 2006. –P. 144 (in Russian)
  87. Melikyan V.Sh. Principles of designing systems of logic simulation with consideration of destabilizing factors // Proceedings of 2nd All-Union scientific-technical conference "Problems of Developing Advanced Micro- and Nanoelectronic Systems-2006" (MES-2006), Moscow, 2006.-P.15-21 (in Russian)
  88. Melikyan V.Sh., Shahinyan T.H., Martirosyan A.A. Combinational method of calculating parasitic elements of substrate of ICs // Proceedings of 2nd All-Union scientific-technical conference "Problems of Developing Advanced Micro- and Nanoelectronic Systems-2006" (MES-2006), Moscow, 2006.-P.72-75 (in Russian)
  89. Melikyan V. Integrated circuits – reduction of sizes, increase of capabilities, complexity of design// In the World of Science, No. 4, Yerevan, 2006.-P. 53-58 (in Armenian)
  90. Melikyan V.Sh., Petrosyan T.A., Gharibyan G.G. Simulation of gate current of CMOS transistor at reducing geometrical sizes // Simulation, optimization, control, SEUA, Vol. 9, No. 1, Yerevan, 2006.-P. 66-74 (in Russian)
  91. Melikyan V.Sh., Martirosyan A.H., Davtyan D.F., Fanyan K.A. HW/SW Partitioning Process Organization through Graph Representation of System Models in System-on Chip Design// Manual of Engineering Academy of Armenia. Vol. 3, No. 2, Yerevan, 2006.-P. 289-292 (in Armenian)
  92. Melikyan V.Sh., Martirosyan A.H., Shahinyan T.H., Manucharyan D.V. System description analysis during HW/SW division process // Manual of Engineering Academy of Armenia. Vol. 4, No. 1, Yerevan, 2007.-P. 95-100 (in Armenian)
  93. Melikyan V.Sh., Chobanyan S.G., Matevosyan A.V. Research of application capabilities of software of mixed-mode analysis for simulating sigma-delta modulators //Electronica I svyaz. No. 21, Vol. 1, Kiev, 2007.-P. 85-88 (in Russian)
  94. Melikyan V.Sh., Matevosyan A.V., Chobanyan S.G., Petrosyan T.A. Combinational method to reduce power consumption of digital CMOS circuits //Electronica I svyaz. Vol. 1, No. 21, Kiev, 2007.-P.89-92 (in Russian)
  95. Melikyan V.Sh., Martirosyan A.H., Melikyan H.V.., Petrosyan T.A., Soghomonyan D.S. Accurate statistical timing analysis method of digital ICs // RAs National Academy of Science and SEUA, Vol. 60, No. 1, Yerevan, 2007.-P. 145-151 (in Armenian)
  96. Melikyan V.Sh., Shahinyan T.H. Dynamic models of substrate of VLSI // Simulation, optimization, control, SEUA, Yerevan, RA,  Vol. 10, No. 1, 2007.-P. 66-72 (in Russian)
  97. Melikyan V., Martirosyan A., Matevosyan A., Chobanyan S. A Mechanism for Providing Congestion Free Traffic Flow in Networks on Chip// Proceedings of 5th IEEE East-West Design & Test Symposium (EWDTS’07), Yerevan, 2007.-P. 304-306 (in English)
  98. Melikyan V., Movsisyan W., Shaghgamyan D., Petrosyan D., Sahakyan K. The Design of Pulse Width Distortion Controller for High-speed I/O Application// Proceedings of 5th IEEE East-West Design & Test Symposium (EWDTS’07), Yerevan, 2007.-P. 307-311 (in English)
  99. Melikyan V., Hovsepyan A., Sargsyan A., Harutyunyan G., Ghasabyan R. A Design Method of Single Event Upset Tolerant Phase Locked Loop// Proceedings of 5th IEEE East-West Design & Test Symposium (EWDTS’07), Yerevan, 2007.-P. 479-481 (in English)
  100. Melikyan V.Sh., Chobanyan S.G. Principles of selecting optimal structure of sigma-delta modulator// Proceedings of 7th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Vol. 2, 2007.-P. 171 (in Russian)
  101. Melikyan V.Sh., Matevosyan A.V. A standard CMOS cell library with application of new styles of providing low power consumption // Proceedings of 7th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Vol. 2, 2007.-P. 259 (in Russian)
  102. Melikyan V.Sh., Shahinyan T.H., Baghramyan B.E. A combinational method of extracting RC model of substrates of VLSI // RAs National Academy of Science and SEUA. Vol. 60, No. 2, Yerevan, 2007.-P. 330-337 (in Armenian)
  103. Melikyan V., Martirosyan A., Matevosyan A., Chobanyan S. Congestion Control Algorithm for Network on Chip Traffic// Proceedings of the 16th International Scientific and Applied Science Conference “Electronics” (ET2007), Sozopol, Sofia, Bulgaria, 2007.-Book 4.-P. 82-87 (in English)
  104. Melikyan V., Petrosyan D., Petrosyan T. The I/O Output Buffer  Auto¬mated Design  with Conside¬ration of Simultaneously Switching Noises// Proceedings of the 16th International Scientific and Applied Science Conference (Electronics ET 2007), Sozopol, Sofia, Bulgaria, 2007.-Book 4.-P. 55-58 (in English)
  105. Melikyan V., Matevosyan A., Martirosyan A., Chobanyan S. Method of reducing buffer power consumption of the router of Network on Chip// Proceedings of the 11th International Conference on Computer-Aided Design of Discrete Devices (CAD’07), Minsk, Belarus, 2007.-P 128-134 (in English)
  106. Melikyan V., Matevosyan A., Martirosyan A., Chobanyan S. Building methodology of digital standard cell libraries for low power design// Proceedings of the 51st International Conference on Electronics, Communications, Computers, Automation and Nuclear Engineering (ETRAN), Herceg Novi, Igalo, Serbia and Montenegro, 2007.-P.112-115 (in English)
  107. Melikyan V., Martirosyan A., Chobanyan S., Matevosyan A. Building Methodology of Digital Standard Cell Libraries for Low Power Design// Proceedings of the 51st ETRAN Conference, Herceg Novi - Igalo, 2007.-P. EL1.4-1-3 (in English)
  108. Melikyan V.Sh., Martirosyan A.G., Matevosyan A.V., Chobanyan S.G. Method to realize joint transition of data flow with various priorities in Network on Chip // Simulation, optimization, control, SEUA, Yerevan, RA,  Vol. 2, 2007.-P. 72-75 (in Russian)
  109. Goldman R.,  Bartleson K., Wood T., Musayelyan H., Melikyan V., Markosyan G. Educating a Nation’s Engineers: A New Paradigm for Indus¬try/Academia Cooperation// Proceedings of Meeting the Growing Demand for Engineers and Their Educators 2010-2020 International Conference, Munich, Germany, 2007.-P. 87-90 (in English)
  110. Goldman R.,  Bartleson K., Wood T., Musayelyan H., Melikyan V., Markosyan G. Synopsys and Higher Education: An Effective Model of Industry/University Partnering for Improving Armenia’s Technology Competitiveness// Proceedings of Armtech’07 Congress, San Francisco, USA, 2007.-P. 57-61 (in English)
  111. Melikyan V.Sh., Kocharyan A.Y., Chobanyan S.G., Matevosyan A.V., Martirosyan A.G. New Method of RSD Correction in 1.5 Bit Structure Pipeline ADC// RAs National Academy of Science and SEUA. Vol. 60, No. 4, Yerevan, 2007.-P. 709-716 (in Armenian)
  112. Melikyan V., Hovsepyan A. Design of High Portable Lock Indicator// Proceedings of the 17th International Scientific and Applied Science Conference “Electronics” (ET 2008), Sozopol, Sofia, Book 3. 2008.-P. 35-38 (in English)
  113. Melikyan V.Sh., Shahinyan T.H. Synthesis of models of substrates on SoC // 3rd All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems-2008” (MES-2008), Moscow, 2008.-P. 154-158 (in Russian)
  114. Melikyan V.Sh. A method of ESD rules check in VLSI // 3rd All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems-2008” (MES-2008), Moscow, 2008.-P. 159-164 (in Russian)
  115. Melikyan V.Sh., Shaghgamyan D.A. A method of calculating integrated cells of I/O cells with code adjustment of nominal value // 3rd All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems-2008” (MES-2008), Moscow, 2008.-P. 374-377 (in Russian)
  116. Melikyan V., Hovsepyan A., Ishkhanyan M., Hakobyan T. Digital Lock Detector for PLL// Proceedings of IEEE East-West Design & Test Symposium (EWDTS’08), Lvov, Ukraine, 2008.-P. 141-142 (in English)
  117. Goldman R., Bartleson K., Wood T., Wang Z., Lan. C., Melikyan V. A New Microelectronics Curri¬culum Created by Synopsys, Inc.// International Conference on Science, Technology and Education Policy. Hangzhou, China, 2008.-P. 83-86 (in English)
  118. Melikyan V.Sh. A method of considering variations of transistor parameters for timing analysis of digital circuits // Simulation, optimization, control, SEUA, Yerevan, RA,  Vol. 11, No. 1, Yerevan, 2008.-P. 59-64 (in Russian)
  119. Melikyan V.Sh., Mkrtchyan K.G., Melikyan E.V., Badalyan D.R. A method of increasing extraction accuracy of parasitic capacitances of IC interconnects // Simulation, optimization, control, SEUA, Yerevan, RA,  Vol. 11, No. 1, 2008.-P. 65-71 (in Russian)
  120. Melikyan V., Shaghgamyan D. The Design of a Code-controlled Resistance Matrix for High-speed I/O Applications// Proceedings of the 52nd ETRAN Conference, Palic, Igalo, 2008.-P.EL2.7-1-3 (in English)
  121. Melikyan V., Hovsepyan A., Ishkhanyan M., Hakobyan T., Harutyunyan G. Lock Detector with Stable Parameters// Proceedings of the 52nd ETRAN Conference, Palic, Igalo, 2008.-P.ME1.8-1-3 (in English)
  122. Melikyan V.Sh., Hovsepyan A.A., Sahakyan K.G. Modeling of the Influence of Total Ionization Dose (TID) Effects on Threshold Voltage of MOS Transistors// Proceedings of 14th International scientific-technical conference of students and PhDs “Radioelectronics, electronics and power engineering”, Moscow, RF, 2008, Vol. 1.-P. 229-230 (in Russian)
  123. Bartleson K., Wood T., Goldman R., Melikyan V. A New Curricula, Oriented at 90nm and Below Technologies// Proceedings of the 7th European Workshop on Microelectronics Education, Budapest, Hungary, 2008.-P. 124-125 (in English)
  124. Melikyan V., Musayelyan H., Markosyan G., Bartleson K., Wood T., Goldman R. An Experience of Industry/University Collaboration in Microelectronics Education// Proceedings of the 7th European Workshop on Microelectronics Education, Budapest, Hungary, 2008.-P. 148-149 (in English)
  125. Melikyan V.Sh. An optimization method of digital circuits based on geometrical programming // Proceedings of 9th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Vol. 2, 2008.-P. 23 (in Russian)
  126. Melikyan V.Sh., Kocharyan A.Y. Calibration Technique for High-speed High Resolution Pipelined ADC// Electronica i svyaz, Vol. 1-2, No. 1, Kiev, 2008.-P. 231-233 (in Russian)
  127. Melikyan V.Sh., Martirosyan A.G., Mkrtchyan K.G., Melikyan E.V., Soghomonyan D.S., Petrosyan T.A. Optimization of power consumption on SoC // Elektronica i svyaz, Vol. 3-4, No.1, Kiev, 2008.-P. 13-17 (in Russian)
  128. Goldman R., Bartleson K., Wood T., Melikyan V. An Experience of Applying Semiconductor Design Curriculum// Proceedings of Armtech’08 Congress, Yerevan, 2008.-P. 25-30 (in English)
  129. Melikyan V., Hovsepyan A., Sahakyan K. Modeling of the influence of total ionization dose  (TID) effects on threshold voltage of MOS transistors// Radioelectronics, electronics and power engineering”, Moscow, 2008, Vol 1.-P. 229-230 (in Russian)
  130. Melikyan V., Petkovic P., Hristov M. Network of Integrated Circuit Design Teaching Centers in Black Sea Region// Report of Black Sea Economic Cooperation Project, cipher BSEC/PDF/13/05 2007, Nis, Serbia, 2008 (in English)
  131. Goldman R., Bartleson K., Wood T., Kranen. K., Cao C., Melikyan V., Markosyan G. Synopsys Open Edu¬cational Design Kit: Capabilities, Deployment and Future// Proceedings of International Conference on Microelectronic Systems Education, San Francisco, USA, 2009.-P.20-24 (in English)
  132. Lyons E., Ganti V., Goldman R., Mahmoodi H., Melikyan V. Full-Custom Design Project for Digital VLSI and IC Design Courses using Generic 90nm CMOS Library// Proceedings of International Conference on Microelectronic Systems Education, San Francisco, USA, 2009.-P. 45-48 (in English)
  133. Melikyan V.Sh. Statistical static timing analysis of digital circuits with consideration of interconnects delays // Proceedings of 10th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Ukraine, 2009.-P. 87 (in Russian)
  134. Melikyan V.Sh. A method of eliminating false paths during statistical static analysis of timing delays of digital circuits // Elektronica i svyaz, Vol. 2-3, No. 1, 2009.-P. 93-96 (in Russian)
  135. Melikyan V.Sh., Sargsyan A.G., Musalyelyan E.O. Definition of optimal number of cascades of ultra wide-band power amplifier with defined elements based on statistical data // Elektronica i svyaz, Vol. 4-5, No. 2, 2009.-P. 104-108 (in Russian)
  136. Melikyan V.Sh., Mirzoyan D.L., Khachatryan A.N., Melikyan E.V. A stable source of reference voltage to temperature and technological dispersion // Elektronica i svyaz, Vol. 2-3, No 1, 2009.-P.100-105 (in Russian)
  137. Melikyan V., Mirzoyan D., Khachatryan A. Threshold Voltage Extractor Circuit// Proceedings of the 53rd Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Vrnjacka Banja, Serbia, 2009.-P.EL3.3-1-4 (in English)
  138. Melikyan V.Sh., Hovsepyan A.A., Makaryan A.A., Alaverdyan R.A., Sargsyan A.G., Sahakyan K.G., Musaelyan E.H. Design Automation Method for Single Event Upset Tolerant Digital Electronics// Proceedings of the 7th International Conference of “Micro- and Nanoelectronics”, Tsakhkadzor, Armenia, 2009.-P.215-217 (in English)
  139. Melikyan V., Khachatryan A., Mirzoyan D. SCR ESD Protection Scheme for Triple-well CMOS Technologies// Proceedings of the 7th International Conference of “Micro- and Nanoelectronics”, Tsakhkadzor, Armenia, 2009.-P.218-221 (in English)
  140. Melikyan V.Sh., Sargsyan A.G., Hovsepyan A.A., Shafik O.P. Voltage Overstress Protection Techniques in CMOS 1.8V to 3.3 Low-to-High Level Shifter Based on 1.8V Technology// Proceedings of the 7th International Conference of “Micro- and Nanoelectronics”, Tsakhkadzor, Armenia, 2009.-P.222-224 (in English)
  141. Melikyan V.Sh., Ishkhanyan M.N., Hovsepyan A.A., Sargsyan A.G., Mirzoyan D.L, Khachatryan A.N. Time reduction method of phased lock loop (PLL)// RAs National Academy of Science and SEUA, Vol. 62, N 2, Yerevan, 2009.-P. 218-223 (in Armenian)
  142. Melikyan V., Hovsepyan A., Vardanyan K. Design Automation Method for Total Ionization Dose Tolerant Integrated Circuits// Annual Journal of Electronics, Vol.2, Num.2, Sofia, 2009.-P.95-96 (in English)
  143. Melikyan V.Sh. Integrated Circuits: “Saving” way of Moore’s law//In Science World, N 4, Yerevan, 2009.-P. 55-62 (in Armenian)
  144. Melikyan V.Sh., Shaghgamyan D.A. Development of resistor-transistor matrix for nodes of termination of wave resistances of ICs // Simulation, optimization, control, SEUA, Yerevan, RA, Vol. 12, No. 1, Yerevan, 2009.-P. 70-75 (in Russian)
  145. Goldman R., Bartleson K., Wood T., Wang Z., Lan C., Melikyan V. A New Microelectronics Curriculum Created by Synopsys, Inc.// Journal US-China Education Review, Vol.6, Num.5, May 2009, (Serial Number 14), Illinois, USA.-P. 45-50 (in English)
  146. Melikyan V., Sahakyan K., Nazaryan A. 5V Tolerant Power Clamps for Mixed-Voltage IC’s in 65nm 2.5V Salicided CMOS Technology// Proceedings of IEEE East-West Design & Test Symposium (EWDTS’09), Moscow, Russia, 2009.-P.263-266 (in English)
  147. Melikyan V., Hovsepyan A., Harutyunyan T. Schematic Protection Method from Influence of Total Ionization Dose Effects on Threshold Voltage of MOS Transistors// Proceedings of IEEE East-West Design & Test Symposium (EWDTS’09), Moscow, Russia, 2009.-P.260-262 (in English)
  148. Melikyan V., Stepanyan H. Self-Calibration Technique of Capacitor’s Mismatching for 1.5 Bit Stage Pipeline ADC// Proceedings of IEEE East-West Design & Test Symposium (EWDTS’09), Moscow, Russia, 2009.-P.84-86 (in English)
  149. Goldman R., Bartleson K., Wood T., Musayelyan H., Melikyan V., Markosyan G. An Effective Model of Industry/University Partnership// Proceedings of 8th ASEE Global Colloquium on Engineering Education, Budapest, Hungary, 2009.-P.74-77 (in English)
  150. Goldman R., Bartleson K., Wood T., Musayelyan H., Melikyan V., Markosyan G. Student Working Groups: A New Form of Improving Microelectronics Education Quality// Proceedings of Armenian Technology Congress (ArmTech’09), San Jose, CA, USA, 2009.-P.67-72 (in English)
  151. Melikyan V., Aghgashyan R. The SEUA and Synopsys Armenia Success Story// Proceedings of Armenian Technology Congress (ArmTech’09), San Jose, CA, USA, 2009.-P.104-106 (in English)
  152. Melikyan V., Hovsepyan A., Ishkhanyan M., Hakobyan T., Harutyunyan G. Design of Lock Detector with Stable Parameters// Proceedings of 4th International Workshop for Design & Test, Riyadh, Saudi Arabia, 2009.-P.10-13 (in English)
  153. Melikyan V., Grigoryan D., Stepanyan A., Melikyan H. Fuzzy FSM of Brauer of combinational digital devices with statistical and dynamic criteria parameters// Simulation, optimization, control, SEUA, Yerevan, RA, No. 12, Vol. 2, Yerevan, 2009.-P.59-65 (in Russian)
  154. Melikyan V., Aharonyan V., Beglaryan H. Energy-saving of electronic devices, connected to universal sequential bus // Electronica I svyaz. Vol. 3, 2010. -P. 86-90 (in Russian)
  155. Melikyan V., Melikyan H., Petrosyan H. Analysis of VTH Hopping Power Consumption Method // Electronica I svyaz. Vol. 4, 2010. -P. 88-90 (in English)
  156. Melikyan V., Petrosyan G., Abovyan S., Shahbazyan L., Stepanyan H., Musayelyan E. Statistical analysis of timing delays of multi-processor systems // Electronica I svyaz. Vol. 5, 2010. -P. 108-112 (in Russian)
  157. Goldman R., Bartleson K. Wood T., Melikyan V. Synopsys’ Interoperable Process Design Kit // Proceedings of 8th European Workshop on Microelectronics Education, Darmstadt, Germany, May 10-12, 2010.-pp. 119-121
  158. Melikyan V.Sh., Mirkovic D.D., Petrosyan H. P., Musayelyan E.H., Stepanyan A.G., Beglaryan N.E. Tuning Methods for Charac¬terizing Complicated Function¬ality Circuits // Proceedings of the 54th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Donji Milanovac, Serbia, 2010.-P. EL2.4-1-4 (in English)
  159. Melikyan V., Mirzoyan D., Petrosyan G. A Process Variation Detection Method // Proceedings of IEEE East-West Design & Test Symposium (EWDTS’10), St. Petersburg, Russia, 2010.-P.30-33 (in English)
  160. Melikyan V., Mirzoyan D., Karapetyan Sh., Babayan E. Stable Current and Voltage Generation under Process Variation // Proceedings of IEEE East-West Design & Test Symposium (EWDTS’10), St. Petersburg, Russia, 2010.-P.40-42 (in English)
  161. Melikyan V. A Methodology of Creating Standard Digital Cell Libraries for SoC Design with low Power // Proceedings of SoC Design: Development Trends and Problems International scientific-technical conference, Zelenograd, Russia, October 19-21, 2010.-P.29 (in Russian)
  162. Melikyan V., Abovyan S., Petrosyan H., Grigoryan D. A Method to Define the Efficiency of Dynamic Scaling of Supply Voltage and Frequency of Multicore Processors // Proceedings of 4th All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems -2010” (MES-2010), Moscow, 2010.-P.353-355 (in Russian)
  163. Melikyan V., Mirzoyan D., Petrosyan H., Aharonyan V. An Algorithm to Define Transistor Sizes, Based on Statistical Static Timing Analysis // Proceedings of 4th All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems -2010” (MES-2010), Moscow, 2010.-P.114-119 (in Russian)
  164. Melikyan V., Grigoryan A. Development of Industry/University Cooperation Model on the Example of Synopsys Armenia Educational Department // Proceedings of International Conference on “State and Perspectives of development of Professional Training and Increase of qualification of Specialists in state participants of CIS towards new directions of developing techniques and technologies, Moscow, 2010.-P.75-78 (in Russian)
  165. Melikyan V. Method of Forming Stable Current and Voltage in Integrated Circuits // Proceedings of International Conference on Computer-Aided Design of Discrete Devices (CAD’10), Minsk, Belarus, 2010.-P. 358-363 (in English)
  166. Melikyan V. Integrated circuits – perspective ways of thermal removal //In the world of Science, N4, Yerevan, 2010.-P. 55-59 (in Armenian)
  167. Melikyan V., Durgaryan A., Petrosyan H., Stepanyan A. Power Efficient, Low Noise 2-5GHz Phase Locked Loop // Proceedings of the 31st International Scientific-Technical Conference on “Electronics and Nanotechnologies”, Kiev, Ukraine, 2011. –P. 66-71 (in English)
  168. Melikyan V., Poghosyan A., Durgaryan A., Petrosyan H., Simonyan M. Method of Parametrical Optimization of Multi-Core Processors // Proceedings of the 31st International Scientific-Technical Conference on “Electronics and Nanotechnologies”, Kiev, Ukraine, 2011. –P. 126-130 (in Russian)
  169. Melikyan V., Petrosyan H., Durgaryan A., Topisirović D. New Retention Flop Architecture with Phase Frequency Detection (PFD) Capabilities // Proceedings of the 55th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Banja Vrućica, Serbia, 2011.-P.EL4.2-1-4 (in English)
  170. Melikyan V., Durgaryan A., Petrosyan H., Topisirović D. A Fully Differential Phase-Frequency Detector Design for Low Noise Phase Locked Loop Applications // Proceedings of the 55th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Banja Vrućica, Serbia, 2011.-P.EL4.3-1-4 (in English)
  171. Melikyan V., Goldman R., Babayan E. Method of Electro-Thermal Co-Simulation of Integrated Circuits // Proceedings of the 8th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2011.-P.207-213 (in English)
  172. Melikyan V., Durgaryan A., Petrosyan H., Melikyan N. Automatic PLL Activation Mechanism from Power Gated State // Proceedings of the 8th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2011.-P.214-217 (in English)
  173. Melikyan V.Sh., Eminyan N.S., Chobanyan S.G., Beglaryan N.H. Design Method of Low-Leakage Hybrid 9T-SRAM // Manual of Engineering Academy of Armenia and SEUA. Vol. 64, No. 3, Yerevan, 2011.-P. 265-274 (in English)
  174. Melikyan V., Durgaryan A. Programmable Current Biasing for Low Noise Voltage Controlled Oscillators // Proceedings of IEEE East-West Design & Test Symposium (EWDTS’11), Sevastopol, Ukraine, 2011.-P.47-50 (in English)
  175. Melikyan V.Sh. Modeling and Optimization Theory of Digital Circuits with Consideration of Destabilizing Factors. Chartarapet, Yerevan, 2011 (in Russian)
  176. Roldman R., Melikyan V., Babayan E. Digital Circuits Verification with Consideration of Destabilizing Factors // Proceedings of the 6th IEEE International Design and Test Workshop (IDT) in Conjunction with IEEE International Conference on Electronics, Circuits and Systems (ICECS), Beirut, Lebanon, 2011.-P.93-98 (in English)
  177. Melikyan V.Sh. Method of Estimating Run Time of Integrated Circuits // Manual of Engineering Academy of Armenia. Vol. 8, No. 4, Yerevan, 2011.-P. 741-745 (in Armenian)
  178. Melikyan V., Babayan E., Harutyunyan A. Pattern-Based Approach to Current Density Verification // Proceedings of the 4th Small Systems Simulation Symposium 2012, Nis, Serbia, 2012.-P.58-61 (in English)
  179. Sassone A., Calimera A., Macii A., Macii E., Poncino M., Goldman R., Melikyan V., Babayan E., Rinaudo S. Investigating the Effects of Inverted Temperature Dependence (ITD) on Clock Distribution Networks // Proceedings of Design, Automation & Test in Europe (DATE’12) conference, Dresden, Germany, 2012.-P.165-167 (in English)
  180. Roldman R., Bartleson K., Wood T., Kranen K., Melikyan V., Babayan E. Student Working Groups: An Effective Form of Improving Microelectronics Education Quality // Proceedings of Interdisciplinary Engineering Design Education (IEDEC) conference, Santa Clara, CA, USA, 2012.-P.88-91(in English)
  181. Melikyan V., Gevorgyan A., Baghdasaryan A., Melikyan H. Thermal Via’s Placement Zones Identifying Using Voronoi Diagrams // Proceedings of the 32th International Scientific Conference Electronics and Nanotechnology (ELNANO 2012), Kiev, Ukraine, 2012.-P.77-79 (in English)
  182. Melikyan V., Balabanyan A., Babayan E., Durgaryan A. Decreasing of Frequency Variation in High-Speed Ring Oscillator using Bandgap Reference // Proceedings of the 32th International Scientific Conference Electronics and Nanotechnology (ELNANO 2012), Kiev, Ukraine, 2012.-P.79-81(in English)
  183. Roldman R., Bartleson K., Wood T., Melikyan V., Babayan E. Synopsys’ Low Power Design Educational Platform // Proceedings of the 9th European Workshop on Microelectronics Education (EWME 2012), Grenoble, France, 2012.-P.23-26 (in English)
  184. Roldman R., Bartleson K., Wood T., Melikyan V., Babayan E., Khazhakyan T. Experience of Low Power Design Teaching // Proceedings of the 9th European Workshop on Microelectronics Education (EWME 2012), Grenoble, France, 2012.-P.141-144 (in English)
  185. Melikyan V., Babayan E., Harutyunyan A. Pattern-Based Approach to Current Density Verification // Electronics, Faculty of Electrical Engineering, University of Banja Luka, Volume 16, Number 1, Serbia, 2012.-P.77-82 (in English)
  186. Melikyan V., Harutyunyan A. Modeling of IC Interconnects and Power Rails. Chartarapet, Yerevan, 2012 (in Armenian)
  187. Melikyan V., Durgaryan A., Khachatryan A., Manukyan H., Musayelyan E. Self-compensating Low Noise Low Power PLL Design // Proceedings of IEEE East-West Design & Test Symposium (EWDTS’12), Kharkov, Ukraine, 2012.-P.29-33 (in English)
  188. Melikyan V., Babayan E., Harutyunyan A., Melikyan N., Zargaryan G. Method of Reducing Thermal Dependence of Timing Delays of Digital Integrated Circuits // Proceedings of 5th All-Russian scientific-technical conference “Problems of Developing Advanced Micro- and Nanoelectronic Systems -2012” (MES-2012), Moscow, Russia, 2012. –P409-412 (in Russian)
  189. Melikyan V.Sh., Gavrilov S.V., Aharonyan V.K., Aslanyan N.K., Hovhannisyan A.S. On-die CMOS Termination Resistor for USB Transmitter // RAs National Academy of Science and SEUA, Yerevan, RA, Vol. 65, N 3, Yerevan, 2012.-P. 295-304 (in English)
  190. Melikyan V.Sh, Durgaryan A.A., Balabanyan A.H., Babayan E.H., Stanojlovic M., Harutyunyan A.G. Process-voltage-temperature Variation Detection and Cancellation Using On-Chip Phase-Locked Loop // Proceedings of the 56th Electronics, Telecommunications, Computers, Automatic Control and Nuclear Engineering (ETRAN) Conference, Zlatibor, Serbia, 2012.-P.EL1.2-1-4 (in English)
  191. Bibilo P.N., Solovev A.L., Melikyan V.Sh., Harutyunyan A.G., Babayan E.H. Power Consumption Estimation of CMOS Digital Circuits Based on Logic Simulation of Their Structural Descriptions // Proceedings of Engineering Academy of Armenia. Vol. 9, No. 3, Yerevan, 2012.-P. 600-610 (in Russian)
  192. Melikyan V., Movsisyan K. Modeling and Design of Power Supply Network of an IC High Speed I/O Interface // RAs National Academy of Science and SEUA, Yerevan, RA, Vol. 65, N 4, Yerevan, 2012.-P. 380-390 (in English)
  193. V. Gourisetty, H. Mahmoodi, V. Melikyan, E. Babayan, R. Goldman, K. Holcomb, T. Wood. Low Power Design Flow Based on Unified Power Format and Synopsys Tool Chain // Proceedings of the Interdisciplinary Engineering Design Education (IEDEC) Conference, Santa Clara, CA, USA, March 4-5, 2013.-P.28-31 (in English)
  194. D. Flynn, T. Wood, Ph. Dworsky, V. Melikyan, E. Babayan. Teaching IC Design with the ARM Cortex-M0 DesignStart Processor and Synopsys 90nm Educational Design Kit // Proceedings of the Interdisciplinary Engineering Design Education (IEDEC) Conference, Santa Clara, CA, USA, March 4-5, 2013.-P.36-38 (in English)
  195. Roldman R., Bartleson K., Wood T., Avetisyan A., Aghgashyan R., Melikyan V., Musayelyan H., Markosyan G. State Engineering University of Armenia (Polytechnic)-Synopsys Cooperation as Successful Example // Proceedings of the University/Industry Cooperation-Accelerating Innovation Scientific-Educational Conference, Yerevan, Armenia, May 15, 2013.-P.59-61 (in Armenian and English)
  196. Melikyan V.Sh., Khachatryan A.N., Mirzoyan D.L., Durgaryan A.A. Models of Electrostatic Discharge Protection Devices Considering the Self-Heating Effects // RAs National Academy of Science and SEUA, Yerevan, RA, Vol. 66, N 1, Yerevan, 2013.-P. 73-83 (in Armenian)
  197. Melikyan V.Sh., Movsisyan K.W. CMOS I/O Driver with Die Process, Voltage, Temperature Variation Compensation // Proceedings of the 9th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2013.-P.165-168 (in English)
  198. Melikyan V.Sh., Osipyan H.A. Systems Design Optimization on Graphics Processing Unit // Proceedings of the 9th International Conference of “Semiconductor Micro- and Nanoelectronics”, Yerevan, Armenia, 2013.-P.169-171 (in English)
  199. Melikyan V., Balabanyan A., Hayrapetyan A., Melikyan N. Receiver/Transmitter Input/Output Termination Resistance Calibration Method // Proceedings of the 2013 IEEE XXXIII International Scientific Conference Electronics and Nanotechnology (ELNANO), Kiev, Ukraine, 2013.-P.126-130 (in English)
  200. Melikyan V., Sloyan K. Comparison of Gate Delay Measurements Implemented via HSpice and PrimeTime Tools // Proceedings of 14th International scientific-practical conference “Contemporary Information and Electronic Technologies”, Odessa, Ukraine, 2013. –P. 311-313 (in English)
  201. Melikyan V.Sh., Hahanov V.I., Shakhov D.V., Saatchyan A.G. Green Wave – Cloud Monitoring and Traffic on Cloud // Manual of SEUA “Information Technologies, Electronics and Radio Engineering”. Vol. 16, No. 1, Yerevan, 2013.-P. 53-60 (in Russian)
  202. Melikyan V. Low Power Digital Standard Cell Library Development Methodology // Manual of SEUA “Information Technologies, Electronics and Radio Engineering”. Vol. 16, No. 1, Yerevan, 2013.-P. 96-102 (in English)