Tuesday, June 5
11:45 a.m. to 1:45 p.m.
San Francisco Marriott Marquis, Golden Gate Ballroom
Incremental improvements to today's tools will not be sufficient to deliver an order of magnitude boost to verification productivity given the complexity of today's SoC designs. Instead, verification teams need innovations in verification.
Synopsys has worked with SoC leaders to define and deploy breakthrough technologies that not only increase the speed and throughput of verification (effectively lower the IT cost of verification), but also offer innovative approaches to avoid bugs altogether, detect them as early as possible, and debug more efficiently.
At this luncheon, industry leaders, such as AMD, Broadcom, Cavium, Freescale, Qualcomm and ST-Ericsson will share their views on what's driving SoC complexity and how their teams have achieved success. They'll also discuss the latest developments in verification. The event will be moderated by John Chilton of Synopsys.
Who should attend
Verification engineers, managers and executives who want to learn how to significantly improve verification productivity.
|11:45 a.m. – 12:00 p.m.||Doors Open / Registration / Complimentary Lunch Served|
|12:00 p.m. – 12:30 p.m.||Industry Keynote on Verification|
|12:30 p.m. – 1:30 p.m.||Panelist Presentations|
|1:30 p.m. – 1:45 p.m.||Prize Drawing|
Attendance at this event is free, but registration is required. Seating is limited, so reserve your seat today.