Y. Kobayashi, Angada B. Sachid, K. Tsutsui, K. Kakushima, P. Ahmet, V. Ramgopal Rao and H. Iwai.
Dept. of Electrical Engineering,
Indian Institute of Technology Bombay

Clarification of robustness for threshold voltage (Vth) variation in FinFETs is very important. Vth variation (delta-Vth) caused by fluctuations of some principal device parameters are evaluated, compared to the planar MOSFETs. However, the origin of delta-Vth is complex in short channel devices due to contribution of short channel effects (SCEs).

Therefore, the origin of delta-Vth is separated into two factors, that is, intrinsic factor which can be determined by Poisson's equation along M-O-S stack, called the 1D factor, and factors caused by SCEs, called 2D factors. The delta-Vth is dominated by both factors on the planar MOSFETs, while it is dominated by the 2D factor on the FinFETs because the amount of spacer charge in the channel is small. Additionally, the delta-Vth is studied in two advanced FinFET structures which show reduced SCEs.

For this work, Sentaurus TCAD tools are used to model the devices.

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