SNUG Germany 2012 Proceedings

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Complete Proceedings


User Papers and Presentations
A1 - User & Tutorial Session: Digital Implementation - Low Power
Clock Gating Analysis in Primetime-PX to Optimize Clock Gating Efficiency (2nd Place - Best Paper)
Author(s): Juergen Karmann, Joachim Voges - Infineon Technologies AG
PaperPresentation

UPF 2.0: Expectations and Experiences
Author(s): Peter Kamphuis, Guido Schlothane - Intel Mobile Communications
PaperPresentation

A2 - User Session & Demo: Digital Implementation - Design Exploration and Feasibility
DC Explorer - Fast Synthesis for Early Design Exploration (Technical Committee Award)
Author(s): Herbert Taucher, Andras Rappai - Siemens AG ; Rolf Ferner - Synopsys
PaperPresentation

Hippo Lake: A case Study of Automated Design Planning in High Speed Designs
Author(s): Justin Barber, Victoria Kolesov , Michael McCoy, Atul Walimbe - Intel
PaperPresentation

Test your Chip with your PC; Running tests, as easy as browsing the internet with your computer
Author(s): Frank Nolting - Synopsys GmbH
Tutorial

A3 - User Session: Digital Verification - Testbench Methodology and Debugging
A Guide to Using SystemC TLM-2.0 IP with UVM
Author(s): John Aynsley, David Long, Doug Smith - Doulos
PaperPresentation

How to Improve Verification Debugging using DVE
Author(s): Joachim Geishauser - Freescale
PaperPresentation

I Spy with My VPI: Monitoring Signals by Name, for the UVM Register Package and More
Author(s): Jonathan Bromley - Verilab
PaperPresentation

A4 - User & Tutorial Session: AMS Verification
A Statistical MOSFET Aging Model for Monte Carlo Simulations with Hspice
Author(s): Florian R. Chouard, Stefan Drapatz, Christoph Werner, Cenk Yilmaz, Doris Schmitt-Landsiedel - Technical University Munich
PaperPresentation

A5 - User & Tutorial Session: Physical Signoff
StarRC Accuracy Analysis of RC Extraction for Advanced Nodes (28nm)
Author(s): Hendrik Mau - GLOBALFOUNDRIES
PaperPresentation

A6 - User & Keynote Session: Automotive & Systems - Keynote & Virtual Prototyping
Applications and Requirements of Virtual Platforms in the Automotive Domain
Author(s): Ingo Feldner - Robert Bosch GmbH
PaperPresentation

Automotive System Verification using Saber/Modelsim Cosimulation in Conjunction with ISO 26262
Author(s): Bernhard von Edlinger, Josef Schmid – iSyst Intelligente Systeme GmbH, Andreas Plange- Conti Temic Microelectronic GmbH, Frank Lehmann –Synopsys GmbH
PaperPresentation

Automotive Track Keynote: Trends and Challenges in Automotive Applications Driving Development
Author(s): Dr. Ing. Christian Sebeke - RobertBosch GmbH
Tutorial

B1 - User Session: Digital Implementation - Design for Test
DFT for Fragmented Digital Blocks in Mixed Signal Designs
Author(s): Richard Illman - Dialog Semiconductor
PaperPresentation

Low Power Design Flow using UPF/CPF
Author(s): Markus Lanz - Austriamicrosystems
PaperPresentation

The Application of DFT-Compilers Core Wrapper Technology to Control a Digital to Analog Interface
Author(s): Karl-Heinz Grieshober, Rainer Kropf, Gerhard Roither - Micronas New Technologies; Hans-Ulrich Grubert, Nikolaus Mittermaier, Frank Nolting - Synopsys
PaperPresentation

B2 - User Session: Digital Implementation - Hierarchical ICC and Constraining
Best Practices of Hierarchical Design Implementation Strategies (3rd Place - Best Paper)
Author(s): Norbert Mueller - LSI
PaperPresentation

Efficient Common Derating for Synopsys Implementation Tools (1st Place - Best Paper, Best Paper Award)
Author(s): Sönke Grimpen - Infineon Technologies AG
PaperPresentation

STA in Custom Design
Author(s): Andreas Küsel - Infineon
PaperPresentation

B4 - User Session: AMS Verification & Design
An Optimized Sizing Procedure for Boost Converter Design
Author(s): Jan Michal - Certicon
PaperPresentation

Deployment of Full Custom Created Timing Shell Methodology to Hand off Macros from CD to ICC
Author(s): Michael Wagner; Oliver Baer, Kurt Haun - Synopsys
PaperPresentation

XA/VCS Powerup Simulation of Automotive SOC
Author(s): Roland Lengfeldner - Infineon Technologies Austria
PaperPresentation

B5 - User & Tutorial Session: System - Designing Programmable HW
A Scalable Multi-Core ASIP Platform for Standard-Compliant Trellis Decoding
Author(s): Christian Brehm, Matthias Jung, Norbert Wehn - University of Kaiserslautern
PaperPresentation

B6 - User Session: Automotive & Systems - Saber
A Complex Glow Plug Interface Suitable for Monte Carlo Analysis with Saber Simulator
Author(s): Octavian Luca, Michael Decker – Continental Corporation
PaperPresentation

Accelerating the Development & Analysis of Automotive Systems through a Fully Automated Simulation-Based Approach
Author(s): Isabelle Maffat, PSA
Presentation

Development of an Electrical Motor Control Based on a VSP
Author(s): Jens Harnisch, Albrecht Mayer, Dian Nugraha, Radovan Vuletic - Infineon Technologies AG
PaperPresentation

C1 - User & Tutorial Session: Digital Implementation - Asynchronous Constraining & Datapath Implementation
An all-Inclusive Clock Domain Crossing Solution
Author(s): Charles Laurent, Phuong Nguyen, Joseph Dekoker, Domenique Spagnuolo - Sigma Designs
PaperPresentation

C2 - User & Demo Session: Digital Implementation - Advanced Constraining
A Way To Future Sign-off: Hierarchical STA Using HyperScale
Author(s): Jürgen Dirks - LSI
PaperPresentation

C3 - User & Tutorial Session: Digital Verification - UVM and X-Propagation
Easier RAL - All You Need to Know About the UVM Register Abstraction Layer
Author(s): Doug Smith - Doulos
PaperPresentation

C6 - User & Tutorial Session: Automotive & Systems - Linking Virtual Platforms and Saber
Virtual Platform for Profinet 2.3 Systems
Author(s): Karl-Theo Kremer, Claudia Kühn, Kai Liu, Andreas von Schwerin - Siemens AG
PaperPresentation

Publication Only
CTMesh Or CTS
Author(s): Loh Phooi Choong, Ang Boon Chong, [Intel]
Paper

Tutorials
A1 - User & Tutorial Session: Digital Implementation - Low Power
Introduction to IEEE1801 (UPF) Supply Sets
Author(s): Knut Dalkowski - Synopsys GmbH
Tutorial

A4 - User & Tutorial Session: AMS Verification
How to Get the Most from Your Circuit Simulation
Author(s): Uwe Trautner - Synopsys GmbH
Tutorial

A5 - User & Tutorial Session: Physical Signoff
Parasitic Extraction for Emerging Technologies: Dealing with Metal Fill in 28nm ECO Extraction Flow
Author(s): Clayton McDonald - Synopsys Sarl
Tutorial

Parasitic Extraction for Emerging Technologies: Double-Patterning Aware Extraction and Timing Signoff at 20nm
Author(s): Clayton McDonald - Synopsys Sarl
Tutorial

B3 - Tutorial: Digital Verification - Verification IP
Discovery VIP - Overview and introduction to the next generation Verification IPs.
Author(s): Fabian Delguste, Adiel Khan - Synopsys
Tutorial

B5 - User & Tutorial Session: System - Designing Programmable HW
Designing Programmable Hardware Accelerators: Gaining Flexibility Without Compromising Power, Area and Performance
Author(s): Gunnar Braun - Synopsys GmbH
Tutorial

C1 - User & Tutorial Session: Digital Implementation - Asynchronous Constraining & Datapath Implementation
Getting the Most from Synthesis to Improve Your Datapath QoR
Author(s): Reto Zimmermann – Synopsys Switzerland
Tutorial

C3 - User & Tutorial Session: Digital Verification - UVM and X-Propagation
Getting X Propagation under Control
Author(s): Werner Kerscher - Synopsys GmbH
Tutorial

C4 - Tutorial: AMS - CD-ICC Co-Design
IC Compiler Custom Co-Design
Author(s): Oliver Bär - Synopsys GmbH

C5 - Tutorial: IP - Memories and Libraries
Best Practices for Implementing Memories and Libraries to Deliver Superior PPA and Embedded Test & Repair
Author(s): Zaka Bhatti - Synopsys
Tutorial

C6 - User & Tutorial Session: Automotive & Systems - Linking Virtual Platforms and Saber
Achieving Accurate & Fast-Paced Simulation for Automotive Power Semiconductors using the Saber/TCAD Integration
Author(s): Andre Jennert - Synopsys GmbH
Tutorial

Linking Saber & Virtualizer for Automotive Hardware/Software Co-Verification
Author(s): Lee Johnson - Synopsys Inc.
Tutorial

Demo
C2 - User & Demo Session: Digital Implementation - Advanced Constraining
Resolution of Common Constraining Issues - Galaxy Constraint Analyzer Demo
Author(s): Gernot Gall - Synopsys GmbH