SNUG France 2013 Proceedings

2014|2013|2012|2011|2010
Sort proceedings by:


Complete Proceedings


User Papers and Presentations
A1 - Functional ECO Automation & UPF Implementation
Converting an Outdated Library for UPF Compliancy Prior to a Low-Power Physical Design that uses Retention Flip-Flops (3rd Place - Best Paper)
Author(s): Etienne Wouters, Ilse Vos - IMEC
PaperPresentation

Leveraging Formality ECO Flow to Speed up Last-Minute Change Verification
Author(s): Laurent Besson - ST-Ericsson
PaperPresentation

Taking Advantage of UPF2.0 for Advanced Low-Power Techniques
Author(s): Frederic Saint-Preux - STMicroelectronics
PaperPresentation

A2 - Accelerating SoC Verification
"Coverage-Driven" ASIC Verification Environments Coupled to an SQL Database
Author(s): Stephane Thoison - Bull
Presentation

A3 - Advanced Topics for Design Closure
28nm FDSOI Leakage Optimisation with Synopsys Flow (2nd Place - Best Paper)
Author(s): Pascal Teissier - STMicroelectronics, Nathalie Zaghlan - Synopsys
PaperPresentation

Advanced CTS Techniques for High-Performance Mobile Designs (Technical Committee Award)
Author(s): Frank Vaneerdewegh - ST-Ericsson
PaperPresentation

Light Advanced on Chip Variation Approach
Author(s): Pierpaolo De Laurentiis - STMicroelectronics
PaperPresentation

A4 - Design for Test and ATPG
Gate-Level DFT Flow Based on Synopsys Tool to Ease IP Reuse in Complex SOC
Author(s): Caroline Carin, Isabelle Delbaere, Emmanuel Solari, Christophe Eychenne - STMicroelectronics
PaperPresentation

Reducing the Tester Resources using Shared IO for a Quad-Core OpenGL ES GPU
Author(s): Fabrice Rieu - STMicroelectronics
PaperPresentation

Using At-speed Testing with OCC (On Chip Clock Control)
Author(s): Bertrand Bruder, Nicolas Graffet, Vincent Chanel - Atmel Corporation, Philippe Rossant - Synopsys
PaperPresentation

A5 - Advanced Techniques for Multi-FPGA Prototyping
Hardware/Software Transaction-Based Verification using the HAPS UMRBus
Author(s): Frederic De Melo - CNRS
Presentation

Prototyping a Large Multi-CPU SoC onto Multi-FPGA Boards using Certify Pin Multiplexing Techniques
Author(s): Benoit Suffran - STMicroelectronics
PaperPresentation

A6 - Analog-Digital Co-Simulation
Improve IC-Level Verification Coverage by using Assertions with CustomSim-VCS Multi-Thread Real Number Flow
Author(s): François Ravatin, Sébastien Cliquennois - ST-Ericsson, Philippe Brahic - Synopsys
PaperPresentation

B1 - Managing Constraints & Lynx Flow
GCA -Based Methodology to Check Quality of Scan Shift Constraints
Author(s): Gianni Lazzari, Giuseppe Fornaciari - STMicroelectronics Italy, Alfredo Conte, Alberto Baldi - Synopsys Italy
PaperPresentation

B2 - Advanced IP Verification
Low-Power Verification using Power State Table Coverage
Author(s): Christophe Lamard, Jean Marie Guillermin - ST Microelectronics, François Cerisier, Mathieu Maisonneuve - Test and Verification Solutions, France
PaperPresentation

Regression Performance Optimization of a Full HD-120fps Video Encoder Based on VCS Multi-Core Functionality
Author(s): Mikael Genay - STMicroelectronics
PaperPresentation

UVM-based Power Aware Platform for Multicore Sub-system Verification
Author(s): Massimo Calligaro - STMicroelectronics
PaperPresentation

B3 - Closure and Signoff
Using PrimeRail for Advanced Microcontroller Dynamic IRdrop Analysis
Author(s): Yann Rebours - STMicroelectronics
PaperPresentation

B4 - Improving Test Quality and Yield
Delay Faults Detection in Synchronous Clock Domain Logic
Author(s): Ravindra Babu Nayudu - Abilis Systems, Frank Nolting - Synopsys
PaperPresentation

Non Scan Logic Handling in a Full Digital Design
Author(s): Cedric Escallier - STMicroelectronics
PaperPresentation

Volume Diagnostics on Slack-based Transition Test Patterns to Improve Yield of a Slow Process
Author(s): Nelly Feldman, Alain Perreard - STMicroelectronics, Christophe Suzor, Salvatore Talluto - Synopsys
PaperPresentation

B5 - FPGA-Based Prototyping Methodology
ASIC to FPGA RTL Prototyping using Synplify Tools
Author(s): Richard Ponizy - STMicroelectronics
PaperPresentation

Complex Mobile Multi-Media SoC Prototyping using Xilinx Virtex 7-based HAPS-70 Systems
Author(s): Paul Robertson - Broadcom, Andy Jolley - Synopsys
PaperPresentation

B6 - Advanced AMS Verification
Aging Model Implementation using MOSRA API Flow from HSPICE to CustomSim (XA) FastSPICE: Applications at STMicroelectronics
Author(s): Florian Cacho, Vincent Huard - STMicroelectronics, Patrice Loth, Manjunatha Vadiarillat, Zhaoping Chen, Joddy Wang - Synopsys
PaperPresentation

Circuit Check Extension to Optimize ERC Flow, User Experience, Guidelines for Expert and Novice Users
Author(s): Alessandro Valerio, Salvatore Santapà, Pierluigi Daglio - STMicroelectronics, Carlo Borromeo, Chi-Tzung Wang - Synopsys
PaperPresentation

The Art of Reliability: Guidelines to Reduce IR-drop and Electro-Migration Effects in Full Custom Designs
Author(s): Paolo Valente, Alessandro Valerio - STMicroelectronics, Claudio Rallo - Synopsys
PaperPresentation

B7 - AMS Co-Design
IC Compiler Custom Co-Design Workshop
Author(s): Synopsys

C2 - Improving Debug Methodology
Kalray’s Advanced Debug Flow using Synopsys Verdi and Certitude Solution
Author(s): Jehan-Philippe Barbiero - Kalray
Presentation

C3 - Physical Implementation
Advanced Technologies FRAM View Generation Methodology (Technical Committee Award Honorable Mention)
Author(s): Sylvain Landelle, Sophie Rabadan - STMicroelectronics, Eric Bouet - Synopsys
PaperPresentation

Concurrent Top and Blocks Level Implementation of a High-Performance Graphics Core using One-Pass Timing Closure in Synopsys ICC (1st Place - Best Paper)
Author(s): Corine Pulvermuller, Julien Guillemain - STMicroelectronics
PaperPresentation

C5 - Emulation, Transaction-Based Verification and Virtual Prototyping
Fast Deployment of Zebu to Perform SW Verification & Development Before Silicon
Author(s): Stephane Haissat - Abilis, Geoffroy Poquet - Synopsys
Presentation

C6 - Advanced AMS Verification and Custom Design
An Accurate Path Verification to Secure and to Speed Up Nanometer Design Closure
Author(s): Salvatore Santapà, Alessandro Valerio, Pierluigi Daglio (STMicroelectronics), Andrea Barletta - Politecnico of Milan , Massimo Prando - Synopsys
PaperPresentation

Tutorials
A2 - Accelerating SoC Verification
Accelerating SoC Verification with Synopsys Discovery VIP and the ARM CCI-400 Cache-Coherent Interconnect
Author(s): Xavier Mathes - Synopsys
Tutorial

A5 - Advanced Techniques for Multi-FPGA Prototyping
FPGA-Based Prototyping Solution: Better, Faster, and Flexible
Author(s): Laurent Sol - Synopsys
Tutorial

A6 - Analog-Digital Co-Simulation
"Digital Supplies are Analog !" - CustomSim-VCS with UPF
Author(s): Pierre-Yves Alla - Synopsys
Tutorial

B1 - Managing Constraints & Lynx Flow
Improve Design Quality with Efficient Design Exploration in Lynx Design System
Author(s): Riccardo Giordani - Synopsys
Tutorial

Minimizing Risk in Multi-clock Designs with GCA1
Author(s): Eric Zann - Synopsys
Tutorial

B3 - Closure and Signoff
IC Compiler ECO Flows for Minimal Physical Impact
Author(s): Pascal Coffin - Synopsys
Tutorial

B5 - FPGA-Based Prototyping Methodology
Methodologies and Techniques for Maximizing Productivity on Large FPGA Designs
Author(s): Xavier Mathes - Synopsys
Tutorial

C1 - Low-Power Full Flow
Introduction of Multi-Bit Banking Solution
Author(s): Eric Bouet - Synopsys
Tutorial

Power-Centric Timing Optimization Flow for an ARM® Cortex™-A7 Quad Core Processor
Author(s): Lionel Belnet - ARM, Dale Lomelino - Synopsys
Tutorial

C2 - Improving Debug Methodology
Debug Hints and Tips using Verdi3 and DVE
Author(s): Jerome Peillat - Synopsys
Tutorial

C3 - Physical Implementation
IC Compiler 2013.03 Release Highlights
Author(s): Oktawian Linda - Synopsys
Tutorial

C4 - Advanced Techniques for Test and ATPG Pattern Simulation
Meeting Quality Goals for Gigascale Designs: Trends and Solutions
Author(s): Alfredo Conte - Synopsys
Tutorial

R&D Q&A Session - Accelerate ATPG Pattern Validation
Author(s): Slimane Boutobza - Synopsys
Tutorial

C5 - Emulation, Transaction-Based Verification and Virtual Prototyping
Redefining the Emulation Landscape for the Latest SoC Challenges with Zebu Server
Author(s): Geoffroy Poquet - Synopsys
Tutorial

Using Virtual Prototypes for the Early Bring-Up and Test of Power Management Software
Author(s): Xavier Buisson - Synopsys
Tutorial

Combo
C6 - Advanced AMS Verification and Custom Design
Full Front-to-Back Custom Design Flow: “The Power of Custom Designer-SE & Laker" (The tutorial is followed by a Customer Testimonial)
Author(s): Guillaume Thomas, - Synopsys, Alain Vigne - BlinkSight
PresentationTutorial