SNUG Canada 2011 Proceedings

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Complete Proceedings


User Papers and Presentations
MA1 User - SystemVerilog & Improving Coverage with DFT Compiler
Hijacking Flops for Fun and Profit (3rd Place - Best Paper)
Author(s): Martin Salomon [STMicroelectronics]
PaperPresentation

SystemVerilog for Design - Lessons Learned (A Practical Approach using Synopsys Tools)
Author(s): Ilian Tzvetanov [Exar Corp.]
PaperPresentation

MA2 User - SystemVerilog & Low Power Verification
A SystemVerilog Based ASIC DV Methodology (2nd Place - Best Paper)
Author(s): Botros Dalou, Abdelhalim El-Aboudi, Dennis Em, Karim Khordoc, Catherine Leung, Markus Pugi, Apurv Shah [Cisco Systems]
PaperPresentation

Benefits of Using MVSIMV-NLP for Low Power Verification
Author(s): Kendall Chan [Advanced Micro Devices, Inc.]
PaperPresentation

MA4 User - Tips and Tricks for Leakage and Useful Skew
Implementing Useful Skew Using Skew Groups
Author(s): Matthew Mei [Cisco Systems]
PaperPresentation

Tricks, Techniques and Assumptions - A Practical Guide to Low Leakage Implementation
Author(s): Richard Wieler, Dennis Lewis [Integrated Device Technology]
Paper

MB1 User & Tutorial - AOCV Analysis with PrimeTime & Low-Power with DesignWare minPower
Enabling Variation-Aware Timing Analysis using PrimeTime Cell-Specific AOCV Margining (Technical Committee Award)
Author(s): Khaled Heloue, Ed Bender, Rajit Seahra [Advanced Micro Devices, Inc.]
PaperPresentation

MB3 User & Tutorial - Circuit Checks and Reliability Analysis
Zapping Bugs in Analog Design with Topological Checks
Author(s): Denitza Tchoevska [Advanced Micro Devices, Inc.], Glen Hertz [Synopsys, Inc.]
PaperPresentation

MB4 User - Advance Routing Techniques for DRC and ECO
Minimum Metal ECO Routing Tips and Tricks (1st Place - Best Paper)
Author(s): Christopher Krueger [STMicroelectronics]
PaperPresentation tcl File

Zero DRCs Zroute Initiative
Author(s): Ilana Shternshain, Peter Churchill [Advanced Micro Devices, Inc.]
PaperPresentation

MC4 User & Tutorial - Block Feasibility with ICC and 3D-IC
Block Feasibility with ICC DP
Author(s): Danny Harutz, Nigasan Ragunathan [Cisco Systems}
PaperPresentation

Tutorials
MA3 Tutorial
Synopsys Custom Design Solution
Author(s): Zuweina Sood [Synopsys, Inc.]
Tutorial

MB1 User & Tutorial - AOCV Analysis with PrimeTime & Low-Power with DesignWare minPower
Implementing Low-Power Datapath Designs with DesignWare minPower Components
Author(s): Meni Jayaswal
Tutorial

MB2 Tutorial & User-torial - Advanced Verification Technologies
Hector RTL to C Equivalency
Author(s): Reily Jacoby [Synopsys Inc.], Boris Hristov [Ciena Corp.]
Tutorial

Native SystemVerilog VIP & Methodology Interoperability
Author(s): Jason Chen [Synopsys Inc.]
Tutorial

MB3 User & Tutorial - Circuit Checks and Reliability Analysis
To Fry or Not to Fry?: That is the Question -- CustomSim-RA Reliability Analysis
Author(s): Glen Hertz, Nic Regis [Synopsys, Inc.]

MC1 Tutorial
Latest Design Compiler Technologies
Author(s): Bob Wiegand [Synopsys, Inc.]
Tutorial

MC2 Tutorial & Panel - X Propogation in GLS & Verification Challenges
Faster Design/Verification Turnaround Time With New RTL Simulation Semantics
Author(s): Jason Chen [Syonpsys Inc.]
Tutorial

MC3 Tutorial
Solving the Latest Parasitic Extraction Challenges with StarRC
Author(s): Tim Guttormson -[Synopsys, Inc.]
Tutorial

MC4 User & Tutorial - Block Feasibility with ICC and 3D-IC
The Path from 2D to 3D-IC Integration
Author(s): Steve Smith [Synopsys, Inc.]
Tutorial

Panel Presentation
MC2 Tutorial & Panel - X Propogation in GLS & Verification Challenges
Verification Management Panel - Discussion of Verification Challenges and Issues
Author(s): Mike Thompson [Huawei Technologies], Gregory King [Ciena Corp.], Brian Yao [Advanced Micro Devices, Inc.], Bryan Morris [Exar]
Presentation